1b78f8027a
Add initial device tree support for ravelin target.
This is a snapshot of dtsi files as of KP.1.0
'commit <370d8eab7cc6> ("Merge "ARM: dts: qcom:
Disable cnss-kiwi SOL on anorak platform"")'.
Modified as per compilation and bootup.
Change-Id: Icb9a6e67879c68dbf894d1713fa2837882b9f00c
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
63 lines
1.3 KiB
Plaintext
63 lines
1.3 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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&soc {
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wil6210: qcom,wil6210 {
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qcom,pcie-parent = <&pcie0>;
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qcom,wigig-en = <&tlmm 91 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&wil6210_refclk_en_pin>;
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qcom,11ad-bus-bw,name = "wil6210";
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qcom,11ad-bus-bw,num-cases = <3>;
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qcom,11ad-bus-bw,num-paths = <1>;
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qcom,11ad-bus-bw,vectors-KBps = <100 512 0 0>,
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<100 512 600000 800000>,
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<100 512 1300000 1300000>;
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qcom,use-ext-supply;
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vdd-s1c-supply = <&S9B>;
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qcom,keep-radio-on-during-sleep;
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qcom,use-ap-power-save;
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status = "disabled";
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};
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};
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&pcie0_rp {
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#address-cells = <5>;
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#size-cells = <0>;
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wil6210_pci: wil6210_pci {
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reg = <0 0 0 0 0>;
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qcom,iommu-group = <&wil6210_pci_iommu_group>;
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#address-cells = <1>;
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#size-cells = <1>;
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wil6210_pci_iommu_group: wil6210_pci_iommu_group {
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reg = <0 0>;
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qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>;
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qcom,iommu-dma = "fastmap";
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qcom,iommu-pagetable = "coherent";
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};
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};
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};
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&tlmm {
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talyn_pins {
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wil6210_refclk_en_pin: wil6210_refclk_en_pin {
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mux {
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pins = "gpio83";
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function = "gpio";
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};
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config {
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pins = "gpio83";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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};
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};
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