6f18ce8026
Add snapshot of device tree bindings from keystone common kernel, branch
"android-mainline-keystone-qcom-release" at c4c12103f9c0 ("Snap for 9228065
from e32903b9a63bb558df8b803b076619c53c16baad to
android-mainline-keystone-qcom-release").
Change-Id: I7682079615cbd9f29340a5c1f2a1d84ec441a1f1
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
34 lines
1.2 KiB
Plaintext
34 lines
1.2 KiB
Plaintext
* Atmel SDHCI controller
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This file documents the differences between the core properties in
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Documentation/devicetree/bindings/mmc/mmc.txt and the properties used by the
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sdhci-of-at91 driver.
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Required properties:
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- compatible: Must be "atmel,sama5d2-sdhci" or "microchip,sam9x60-sdhci".
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- clocks: Phandlers to the clocks.
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- clock-names: Must be "hclock", "multclk", "baseclk" for
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"atmel,sama5d2-sdhci".
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Must be "hclock", "multclk" for "microchip,sam9x60-sdhci".
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Optional properties:
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- assigned-clocks: The same with "multclk".
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- assigned-clock-rates The rate of "multclk" in order to not rely on the
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gck configuration set by previous components.
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- microchip,sdcal-inverted: when present, polarity on the SDCAL SoC pin is
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inverted. The default polarity for this signal is described in the datasheet.
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For instance on SAMA5D2, the pin is usually tied to the GND with a resistor
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and a capacitor (see "SDMMC I/O Calibration" chapter).
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Example:
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mmc0: sdio-host@a0000000 {
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compatible = "atmel,sama5d2-sdhci";
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reg = <0xa0000000 0x300>;
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interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
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clocks = <&sdmmc0_hclk>, <&sdmmc0_gclk>, <&main>;
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clock-names = "hclock", "multclk", "baseclk";
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assigned-clocks = <&sdmmc0_gclk>;
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assigned-clock-rates = <480000000>;
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};
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