6f18ce8026
Add snapshot of device tree bindings from keystone common kernel, branch
"android-mainline-keystone-qcom-release" at c4c12103f9c0 ("Snap for 9228065
from e32903b9a63bb558df8b803b076619c53c16baad to
android-mainline-keystone-qcom-release").
Change-Id: I7682079615cbd9f29340a5c1f2a1d84ec441a1f1
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
49 lines
1.1 KiB
Plaintext
49 lines
1.1 KiB
Plaintext
Device Tree Clock bindings for arch-moxart
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This binding uses the common clock binding[1].
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[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
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MOXA ART SoCs allow to determine PLL output and APB frequencies
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by reading registers holding multiplier and divisor information.
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PLL:
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Required properties:
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- compatible : Must be "moxa,moxart-pll-clock"
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- #clock-cells : Should be 0
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- reg : Should contain registers location and length
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- clocks : Should contain phandle + clock-specifier for the parent clock
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Optional properties:
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- clock-output-names : Should contain clock name
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APB:
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Required properties:
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- compatible : Must be "moxa,moxart-apb-clock"
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- #clock-cells : Should be 0
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- reg : Should contain registers location and length
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- clocks : Should contain phandle + clock-specifier for the parent clock
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Optional properties:
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- clock-output-names : Should contain clock name
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For example:
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clk_pll: clk_pll@98100000 {
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compatible = "moxa,moxart-pll-clock";
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#clock-cells = <0>;
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reg = <0x98100000 0x34>;
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};
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clk_apb: clk_apb@98100000 {
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compatible = "moxa,moxart-apb-clock";
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#clock-cells = <0>;
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reg = <0x98100000 0x34>;
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clocks = <&clk_pll>;
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};
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