f2f6309548
Add the nodes to enable qrtr communication between primary vm and oemvm on kera. This adds platform devices and vdevice descriptions to start the qrtr gunyah transport on both primary vm and oemvm device trees. This also adds the device tree node to configure qrtr as node id 21 on oem vm. Change-Id: Icdcfcb4872351df13561c2c6963f06094f46d8c6 Signed-off-by: Pranav Mahesh Phansalkar <quic_pphansal@quicinc.com>
331 lines
7.0 KiB
Plaintext
331 lines
7.0 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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/ {
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#address-cells = <0x2>;
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#size-cells = <0x2>;
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qcom,msm-id = <659 0x10000>, <686 0x10000>;
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interrupt-parent = <&vgic>;
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chosen {
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bootargs = "nokaslr log_buf_len=256K console=hvc0 loglevel=8 swiotlb=noforce";
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};
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cpus {
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#address-cells = <0x2>;
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#size-cells = <0x0>;
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CPU0: cpu@0 {
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compatible = "arm,armv8";
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reg = <0x0 0x0>;
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device_type = "cpu";
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enable-method = "psci";
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cpu-idle-states = <&CPU_PWR_DWN
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&CLUSTER_PWR_DWN>;
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};
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CPU1: cpu@100 {
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compatible = "arm,armv8";
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reg = <0x0 0x100>;
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device_type = "cpu";
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enable-method = "psci";
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cpu-idle-states = <&CPU_PWR_DWN
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&CLUSTER_PWR_DWN>;
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};
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};
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idle-states {
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CPU_PWR_DWN: c4 { /* Using Medium C4 latencies */
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compatible = "arm,idle-state";
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status = "disabled";
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};
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CLUSTER_PWR_DWN: ss3 { /* C4+CL5+SS3 */
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compatible = "arm,idle-state";
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status = "disabled";
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};
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};
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qcom,vm-config {
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compatible = "qcom,vm-1.0";
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vm-type = "aarch64-guest";
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boot-config = "fdt,unified";
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os-type = "linux";
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kernel-entry-segment = "kernel";
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kernel-entry-offset = <0x0 0x0>;
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vendor = "QTI";
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image-name = "qcom,oemvm";
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qcom,pasid = <0x0 0x22>;
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qcom,qtee-config-info = "p=3,9,39,7C,8F,97,159,7F1,CDF;";
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qcom,secdomain-ids = <49>;
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qcom,primary-vm-index = <0>;
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vm-uri = "vmuid/oemvm";
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vm-guid = "847bfe26-0b12-5728-812a-06103f6bdec0";
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qcom,sensitive;
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vm-attrs = "context-dump", "crash-restart";
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memory {
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#address-cells = <0x2>;
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#size-cells = <0x0>;
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/*
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* IPA address linux image is loaded at. Must be within
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* first 1GB due to memory hotplug requirement.
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*/
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base-address = <0x0 0x88800000 >;
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};
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segments {
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config_cpio = <2>;
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};
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vcpus {
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config = "/cpus";
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affinity = "proxy";
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affinity-map = <0x0 0x0>;
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sched-priority = <0>; /* relative to PVM */
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sched-timeslice = <2000>; /* in ms */
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};
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interrupts {
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config = &vgic;
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};
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vdevices {
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generate = "/hypervisor";
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minidump {
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vdevice-type = "minidump";
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push-compatible = "qcom,minidump_rm";
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minidump_allowed;
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};
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rm-rpc {
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vdevice-type = "rm-rpc";
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generate = "/hypervisor/qcom,resource-mgr";
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console-dev;
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message-size = <0x000000f0>;
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queue-depth = <0x00000008>;
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qcom,label = <0x1>;
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};
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virtio-mmio@0 {
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vdevice-type = "virtio-mmio";
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generate = "/virtio-mmio";
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peer-default;
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vqs-num = <0x1>;
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push-compatible = "virtio,mmio";
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dma-coherent;
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dma_base = <0x0 0x0>;
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memory {
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qcom,label = <0x16>; //for persist.img
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#address-cells = <0x2>;
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base = <0x0 0xFFEFC000>;
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};
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};
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virtio-mmio@1 {
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vdevice-type = "virtio-mmio";
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generate = "/virtio-mmio";
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peer-default;
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vqs-num = <0x2>;
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push-compatible = "virtio,mmio";
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dma-coherent;
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dma_base = <0x0 0x4000>;
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memory {
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qcom,label = <0x13>; //for system.img
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#address-cells = <0x2>;
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base = <0x0 0xFFF00000>;
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};
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};
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swiotlb-shm {
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vdevice-type = "shm";
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generate = "/swiotlb";
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push-compatible = "swiotlb";
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peer-default;
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dma_base = <0x0 0x8000>;
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memory {
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qcom,label = <0x14>;
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#address-cells = <0x2>;
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base = <0x0 0xFFF04000>;
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};
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};
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vrtc {
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vdevice-type = "vrtc-pl031";
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peer-default;
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allocate-base;
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};
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mem-buf-message-queue-pair {
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vdevice-type = "message-queue-pair";
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generate = "/hypervisor/membuf-msgq-pair";
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message-size = <0x000000f0>;
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queue-depth = <0x00000008>;
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peer-default;
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qcom,label = <0x000000C>;
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};
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test-dbl-oemvm {
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vdevice-type = "doorbell";
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generate = "/hypervisor/test-dbl-oemvm";
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qcom,label = <0x5>;
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peer-default;
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};
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test-dbl-oemvm-source {
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vdevice-type = "doorbell-source";
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generate = "/hypervisor/test-dbl-oemvm-source";
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qcom,label = <0x5>;
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peer-default;
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};
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test-msgq-oemvm {
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vdevice-type = "message-queue-pair";
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generate = "/hypervisor/test-msgq-oemvm-pair";
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message-size = <0xf0>;
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queue-depth = <0x8>;
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qcom,label = <0x5>;
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peer-default;
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};
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test-large-dmabuf-oemvm {
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vdevice-type = "message-queue-pair";
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generate = "/hypervisor/test-large-dmabuf-oemvm-pair";
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message-size = <0xf0>;
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queue-depth = <0x8>;
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qcom,label = <0xe>;
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peer-default;
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};
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qrtr-shm {
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vdevice-type = "shm-doorbell";
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generate = "/hypervisor/qrtr-shm";
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push-compatible = "qcom,qrtr-gunyah-gen";
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peer-default;
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memory {
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qcom,label = <0x8>;
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allocate-base;
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};
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};
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};
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};
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firmware: firmware {
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qcom_scm: scm {
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compatible = "qcom,scm";
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};
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};
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soc: soc { };
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};
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&soc {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0 0 0xffffffff>;
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compatible = "simple-bus";
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psci {
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compatible = "arm,psci-1.0";
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method = "smc";
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};
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vgic: interrupt-controller@17100000 {
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compatible = "arm,gic-v3";
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interrupt-controller;
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#interrupt-cells = <0x3>;
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#redistributor-regions = <1>;
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redistributor-stride = <0x0 0x40000>;
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reg = <0x17100000 0x10000>, /* GICD */
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<0x17180000 0x200000>; /* GICR * 8 */
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};
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arch_timer: timer {
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compatible = "arm,armv8-timer";
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always-on;
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
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clock-frequency = <19200000>;
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};
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qcom,mem-buf {
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compatible = "qcom,mem-buf";
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qcom,mem-buf-capabilities = "consumer";
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qcom,ipa-range = <0x0 0x0 0xf 0xffffffff>;
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qcom,dmabuf-ipa-size = <0x1 0x00000000>; /* 4GB IPA space for dmabuf */
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qcom,vmid = <49>;
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};
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qcom,mem-buf-msgq {
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compatible = "qcom,mem-buf-msgq";
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qcom,msgq-names = "oem_vm";
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};
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virtio_mem_device {
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compatible = "qcom,virtio-mem";
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/* Must be memory_block_size_bytes() aligned */
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qcom,max-size = <0x0 0x10000000>;
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qcom,ipa-range = <0x0 0x0 0xf 0xffffffff>;
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qcom,block-size = <0x400000>;
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};
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qcom,test-dbl-oemvm {
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compatible = "qcom,gh-dbl";
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qcom,label = <0x5>;
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};
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qcom,test-msgq-oemvm {
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compatible = "qcom,gh-msgq-test";
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gunyah-label = <0x5>;
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affinity = <0>;
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};
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qcom,test-large-dmabuf-oemvm {
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compatible = "qcom,gh-large-dmabuf-test";
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gunyah-label = <0xe>;
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};
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qcom,gh-qtimer@1742b000 {
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compatible = "qcom,gh-qtmr";
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reg = <0x1742b000 0x1000>;
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reg-names = "qtmr-base";
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interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "qcom,qtmr-intr";
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qcom,secondary;
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};
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qcom_smcinvoke {
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compatible = "qcom,smcinvoke";
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};
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qcom_mem_object {
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compatible = "qcom,mem-object";
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};
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qcom,qrtr {
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compatible = "qcom,qrtr";
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qcom,node-id = <21>;
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};
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qrtr-gunyah {
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compatible = "qcom,qrtr-gunyah";
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gunyah-label = <8>;
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};
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qtee_shmbridge {
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compatible = "qcom,tee-shared-memory-bridge";
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qcom,custom-bridge-size = <512>;
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qcom,support-hypervisor;
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};
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};
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