6f18ce8026
Add snapshot of device tree bindings from keystone common kernel, branch
"android-mainline-keystone-qcom-release" at c4c12103f9c0 ("Snap for 9228065
from e32903b9a63bb558df8b803b076619c53c16baad to
android-mainline-keystone-qcom-release").
Change-Id: I7682079615cbd9f29340a5c1f2a1d84ec441a1f1
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
44 lines
1.1 KiB
Plaintext
44 lines
1.1 KiB
Plaintext
Mediatek IPU controller
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============================
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The Mediatek ipu controller provides various clocks to the system.
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Required Properties:
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- compatible: Should be one of:
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- "mediatek,mt8183-ipu_conn", "syscon"
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- "mediatek,mt8183-ipu_adl", "syscon"
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- "mediatek,mt8183-ipu_core0", "syscon"
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- "mediatek,mt8183-ipu_core1", "syscon"
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- #clock-cells: Must be 1
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The ipu controller uses the common clk binding from
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Documentation/devicetree/bindings/clock/clock-bindings.txt
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The available clocks are defined in dt-bindings/clock/mt*-clk.h.
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Example:
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ipu_conn: syscon@19000000 {
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compatible = "mediatek,mt8183-ipu_conn", "syscon";
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reg = <0 0x19000000 0 0x1000>;
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#clock-cells = <1>;
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};
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ipu_adl: syscon@19010000 {
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compatible = "mediatek,mt8183-ipu_adl", "syscon";
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reg = <0 0x19010000 0 0x1000>;
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#clock-cells = <1>;
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};
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ipu_core0: syscon@19180000 {
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compatible = "mediatek,mt8183-ipu_core0", "syscon";
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reg = <0 0x19180000 0 0x1000>;
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#clock-cells = <1>;
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};
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ipu_core1: syscon@19280000 {
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compatible = "mediatek,mt8183-ipu_core1", "syscon";
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reg = <0 0x19280000 0 0x1000>;
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#clock-cells = <1>;
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};
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