e0d8f461df
Updated "iommu-addresses" in Sun to make it Upstream compatible Change-Id: I1cccdd63b8e1bb70e69a74e7e2030795f6c8b561 Signed-off-by: Chirag Rastogi <quic_crastogi@quicinc.com>
63 lines
1.7 KiB
Plaintext
63 lines
1.7 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include "ipa.dtsi"
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&ipa_hw {
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qcom,interconnect,num-cases = <5>;
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qcom,interconnect,num-paths = <3>;
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qcom,ipa-wdi-opt-dpath;
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interconnects = <&aggre2_noc MASTER_IPA &gem_noc SLAVE_LLCC>,
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<&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>,
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<&gem_noc MASTER_APPSS_PROC &cnoc_main SLAVE_IPA_CFG>;
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interconnect-names = "ipa_to_llcc", "llcc_to_ebi1", "appss_to_ipa";
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/* ipa and gsi interrupts */
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interrupts =
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<0 655 IRQ_TYPE_LEVEL_HIGH>,
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<0 432 IRQ_TYPE_LEVEL_HIGH>;
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/* No vote */
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qcom,no-vote =
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<0 0 0 0 0 0>;
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/* SVS2 */
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qcom,svs2 =
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<600000 0 600000 1300000 0 76800>;
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/* SVS */
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qcom,svs =
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<1200000 0 1200000 2800000 0 150000>;
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/* NOMINAL */
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qcom,nominal =
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<2400000 0 2400000 5500000 0 400000>;
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/* TURBO */
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qcom,turbo =
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<3600000 0 3600000 5500000 0 400000>;
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qcom,bus-vector-names = "MIN", "SVS2", "SVS", "NOMINAL",
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"TURBO";
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/* Low Latency pipe alloc factor */
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qcom,ipa-gen-rx-ll-pool-sz-factor = <1>;
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};
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&soc {
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ipa_smmu_ap_partition: ipa_smmu_ap_partition {
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iommu-addresses = <&ipa_smmu_ap 0x0 0x20000000>,
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<&ipa_smmu_ap 0x40000000 0xC0000000>;
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};
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};
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&ipa_smmu_ap {
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/delete-property/ qcom,iommu-dma-addr-pool;
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memory-region = <&ipa_smmu_ap_partition>;
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qcom,additional-mapping =
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/* modem tables in IMEM */
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<0x14683000 0x14683000 0x2000>;
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};
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