e071da204f
Signed-off-by: Ram Nagesh <quic_ramnages@quicinc.com> Change-Id: Ia7dc3119a366e42166e2a5e7cce988a471704dff
87 lines
2.3 KiB
Plaintext
87 lines
2.3 KiB
Plaintext
Qualcomm Technologies, Inc. IPCLite Framework
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This binding describes IPCLite protocol within the system.
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IPCLite is a light weight mechanism for communication between
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subsystem-pairs. This protocol will be primarily used to
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support low-latency signalling for Global Synx framework.
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- compatible :
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Usage: required
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Value type: <stringlist>
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Definition: must be "qcom,ipclite"
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- label:
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Usage: optional
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Value type: <string>
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Definition: should specify the subsystem name this edge corresponds to.
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- global_atomic:
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Usage: required
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Value type: <u32>
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Definition: this property specifies if the core supports global atomic operations
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1 if cores supports, 0 if core doesn't support global atomic operations
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- interrupts:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: should specify the IRQ used by the remote processor to
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signal this processor about communication related events
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- qcom,remote-pid:
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Usage: required for ipcmem
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Value type: <u32>
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Definition: specifies the identifier of the remote endpoint of this edge
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- mboxes:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: reference to the "rpm_hlos" mailbox in APCS, as described
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in mailbox/mailbox.txt
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= EXAMPLE
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The following example represents the IPCLite node along with cdsp sub-node.
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ipclite {
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compatible = "qcom,ipclite";
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memory-region = <&global_sync_mem>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ipclite_cdsp: cdsp {
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qcom,remote-pid = <5>;
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label = "cdsp";
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global_atomic = <0>;
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ipclite_signal_0 {
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index = <0>;
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mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP
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IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MSG>;
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interrupt-parent = <&ipcc_compute_l0>;
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interrupts = <IPCC_CLIENT_CDSP
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IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MSG
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IRQ_TYPE_EDGE_RISING>;
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};
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ipclite_signal_1 {
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index = <1>;
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mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP
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IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MEM_INIT>;
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interrupt-parent = <&ipcc_compute_l0>;
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interrupts = <IPCC_CLIENT_CDSP
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IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MEM_INIT
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IRQ_TYPE_EDGE_RISING>;
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};
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ipclite_signal_2 {
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index = <2>;
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mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP
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IPCC_COMPUTE_L0_SIGNAL_IPCLITE_VERSION>;
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interrupt-parent = <&ipcc_compute_l0>;
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interrupts = <IPCC_CLIENT_CDSP
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IPCC_COMPUTE_L0_SIGNAL_IPCLITE_VERSION
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IRQ_TYPE_EDGE_RISING>;
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};
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};
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};
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