52b48b023a
Enable IPA HW Accelerator block on monaco. Change-Id: I4e669ad7333f370b85e3c1e3a815e37b2f338dbb Signed-off-by: Pavan Kumar M <quic_rpavan@quicinc.com>
129 lines
3.1 KiB
Plaintext
129 lines
3.1 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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&soc {
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qcom,msm_gsi {
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compatible = "qcom,msm_gsi";
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};
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qcom,rmnet-ipa {
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compatible = "qcom,rmnet-ipa3";
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qcom,rmnet-ipa-ssr;
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qcom,ipa-platform-type-msm;
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qcom,ipa-advertise-sg-support;
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qcom,ipa-napi-enable;
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};
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qcom,ipa_fws {
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compatible = "qcom,pil-tz-generic";
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qcom,pas-id = <0xf>;
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qcom,firmware-name = "ipa_fws";
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qcom,pil-force-shutdown;
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memory-region = <&pil_ipa_fw_mem>;
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status = "disabled";
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};
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ipa_hw: qcom,ipa@0x5800000 {
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compatible = "qcom,ipa";
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reg = <0x5800000 0x84000>,
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<0x5804000 0x23000>;
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reg-names = "ipa-base", "gsi-base";
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pas-ids = <0xf>;
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firmware-names = "ipa_fws";
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memory-regions = <&pil_ipa_fw_mem>;
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interrupts = <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "ipa-irq", "gsi-irq";
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qcom,ipa-hw-ver = <20>; /* IPA core version = IPAv4.11 */
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qcom,ipa-hw-mode = <0>;
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qcom,platform-type = <1>; /* MSM platform */
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qcom,ee = <0>;
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qcom,use-ipa-tethering-bridge;
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qcom,modem-cfg-emb-pipe-flt;
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qcom,ipa-wdi2;
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qcom,ipa-wdi2_over_gsi;
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qcom,arm-smmu;
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qcom,use-64-bit-dma-mask;
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qcom,lan-rx-napi;
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qcom,wan-use-skb-page;
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qcom,rmnet-ctl-enable;
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qcom,ipa-endp-delay-wa;
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qcom,tx-wrapper-cache-max-size = <400>;
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clock-names = "core_clk";
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clocks = <&rpmcc RPM_SMD_IPA_CLK>;
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qcom,max_num_smmu_cb = <4>;
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/* No vote */
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qcom,no-vote =
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<0 0 0 0 0 0>;
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/* SVS2 */
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qcom,svs2 =
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<80000 465000 80000 68570 80000 30>;
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/* SVS */
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qcom,svs =
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<80000 2000000 80000 267461 80000 109890>;
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/* NOMINAL */
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qcom,nominal =
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<206000 4000000 206000 712961 206000 491520>;
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/* TURBO */
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qcom,turbo =
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<206000 5598900 206000 1436481 206000 491520>;
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qcom,bus-vector-names = "MIN", "SVS2", "SVS", "NOMINAL",
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"TURBO";
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qcom,throughput-threshold = <600 2500 5000>;
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qcom,scaling-exceptions = <>;
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/* smp2p information */
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qcom,smp2p_map_ipa_1_out {
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compatible = "qcom,smp2p-map-ipa-1-out";
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qcom,smem-states = <&smp2p_ipa_1_out 0>;
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qcom,smem-state-names = "ipa-smp2p-out";
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};
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qcom,smp2p_map_ipa_1_in {
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compatible = "qcom,smp2p-map-ipa-1-in";
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interrupts-extended = <&smp2p_ipa_1_in 0 0>;
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interrupt-names = "ipa-smp2p-in";
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};
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ipa_smmu_ap: ipa_smmu_ap {
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compatible = "qcom,ipa-smmu-ap-cb";
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iommus = <&apps_smmu 0x04A0 0x0>;
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qcom,iommu-dma-addr-pool = <0x20000000 0x20000000>;
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qcom,additional-mapping =
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/* modem tables in IMEM */
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<0x0C123000 0x0C123000 0x2000>;
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qcom,iommu-dma = "fastmap";
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qcom,ipa-q6-smem-size = <36864>;
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};
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ipa_smmu_wlan: ipa_smmu_wlan {
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compatible = "qcom,ipa-smmu-wlan-cb";
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iommus = <&apps_smmu 0x04A1 0x0>;
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qcom,iommu-dma = "atomic";
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};
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ipa_smmu_uc: ipa_smmu_uc {
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compatible = "qcom,ipa-smmu-uc-cb";
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iommus = <&apps_smmu 0x04A2 0x0>;
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qcom,iommu-dma-addr-pool = <0x20000000 0x20000000>;
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qcom,iommu-dma = "atomic";
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};
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ipa_smmu_11ad: ipa_smmu_11ad {
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compatible = "qcom,ipa-smmu-11ad-cb";
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iommus = <&apps_smmu 0x04A3 0x0>;
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qcom,shared-cb;
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qcom,iommu-group = <>;
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};
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};
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};
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