be33284342
This change adds cesta to connectors list on MTP Harmonium, CDP and QRD platforms. Change-Id: I5a4bc421daf5a70ec0b67661d826c6adf5c31a80 Signed-off-by: Sampurna Bolloju <quic_sampboll@quicinc.com> Signed-off-by: lnxdisplay <lnxdisplay@localhost>
148 lines
4.6 KiB
Plaintext
148 lines
4.6 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include "tuna-sde-display.dtsi"
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&dsi_nt37801_amoled_cmd {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
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qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <10>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,mdss-brightness-max-level = <8191>;
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qcom,mdss-dsi-bl-inverted-dbv;
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qcom,platform-reset-gpio = <&tlmm 14 0>;
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qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
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};
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&dsi_nt37801_amoled_cmd_cphy {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
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qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <10>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,mdss-brightness-max-level = <8191>;
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qcom,mdss-dsi-bl-inverted-dbv;
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qcom,platform-reset-gpio = <&tlmm 14 0>;
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qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
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};
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&dsi_nt37801_amoled_video {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
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qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <10>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,mdss-brightness-max-level = <8191>;
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qcom,mdss-dsi-bl-inverted-dbv;
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qcom,platform-reset-gpio = <&tlmm 14 0>;
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qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
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};
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&dsi_nt37801_amoled_video_cphy {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
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qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <10>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,mdss-brightness-max-level = <8191>;
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qcom,mdss-dsi-bl-inverted-dbv;
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qcom,platform-reset-gpio = <&tlmm 14 0>;
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qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
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};
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&dsi_nt37801_amoled_qsync_cmd_cphy {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
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qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <10>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,mdss-brightness-max-level = <8191>;
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qcom,mdss-dsi-bl-inverted-dbv;
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qcom,platform-reset-gpio = <&tlmm 14 0>;
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qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
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};
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&dsi_nt37801_amoled_qsync_video_cphy {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
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qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <10>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,mdss-brightness-max-level = <8191>;
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qcom,mdss-dsi-bl-inverted-dbv;
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qcom,platform-reset-gpio = <&tlmm 14 0>;
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qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
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};
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&dsi_sim_cmd {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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};
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&dsi_sim_vid {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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};
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&dsi_sim_dsc_375_cmd {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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};
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&dsi_sim_dsc_10b_cmd {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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};
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&dsi_dual_sim_cmd {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,bl-dsc-cmd-state = "dsi_lp_mode";
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};
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&dsi_dual_sim_dsc_375_cmd {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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};
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&dsi_sim_sec_hd_cmd {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
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qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply_sim>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <1023>;
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};
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&sde_dsi {
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qcom,dsi-default-panel = <&dsi_nt37801_amoled_cmd_cphy>;
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};
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&sde_dp {
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status = "ok";
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};
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&mdss_mdp {
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connectors = <&sde_dsi &sde_dsi1 &smmu_sde_unsec &smmu_sde_sec &sde_wb1 &sde_wb2 &sde_dp
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&sde_cesta>;
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};
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&qupv3_se4_spi {
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st_fts@0 {
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panel = <&dsi_nt37801_amoled_cmd_cphy
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&dsi_nt37801_amoled_video_cphy
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&dsi_nt37801_amoled_cmd
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&dsi_nt37801_amoled_video
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&dsi_nt37801_amoled_qsync_cmd_cphy
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&dsi_nt37801_amoled_qsync_video_cphy>;
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};
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};
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