a93a4ec33d
Describe the registers and interrupts of the arm-smmu device. Change-Id: Ib228045ccfdc4a16204428b9bdbf7e1d6ff06a92 Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
469 lines
9.5 KiB
Plaintext
469 lines
9.5 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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/ {
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model = "Qualcomm Technologies, Inc. Sun";
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compatible = "qcom,sun";
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qcom,msm-id = <618 0x10000>;
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interrupt-parent = <&intc>;
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#address-cells = <2>;
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#size-cells = <2>;
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memory { device_type = "memory"; reg = <0 0 0 0>; };
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chosen: chosen {
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bootargs = "nokaslr kpti=0 log_buf_len=256K swiotlb=0 loop.max_part=7";
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};
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aliases { };
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cpus {
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#address-cells = <2>;
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#size-cells = <0>;
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CPU0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x0>;
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enable-method = "spin-table";
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cpu-release-addr = <0x0 0x90000000>;
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next-level-cache = <&L2_0>;
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L2_0: l2-cache {
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compatible = "arm,arch-cache";
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cache-level = <2>;
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};
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};
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CPU1: cpu@100 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x100>;
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enable-method = "spin-table";
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cpu-release-addr = <0x0 0x90000000>;
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next-level-cache = <&L2_0>;
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};
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CPU2: cpu@200 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x200>;
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enable-method = "spin-table";
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cpu-release-addr = <0x0 0x90000000>;
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next-level-cache = <&L2_0>;
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};
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CPU3: cpu@300 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x300>;
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enable-method = "spin-table";
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cpu-release-addr = <0x0 0x90000000>;
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next-level-cache = <&L2_0>;
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};
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CPU4: cpu@400 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x400>;
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enable-method = "spin-table";
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cpu-release-addr = <0x0 0x90000000>;
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next-level-cache = <&L2_0>;
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};
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CPU5: cpu@500 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x500>;
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enable-method = "spin-table";
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cpu-release-addr = <0x0 0x90000000>;
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next-level-cache = <&L2_0>;
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};
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CPU6: cpu@10000 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x10000>;
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enable-method = "spin-table";
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cpu-release-addr = <0x0 0x90000000>;
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next-level-cache = <&L2_6>;
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L2_6: l2-cache {
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compatible = "arm,arch-cache";
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cache-level = <2>;
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};
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};
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CPU7: cpu@10100 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x10100>;
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enable-method = "spin-table";
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cpu-release-addr = <0x0 0x90000000>;
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next-level-cache = <&L2_6>;
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};
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cpu-map {
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cluster0 {
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core0 {
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cpu = <&CPU0>;
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};
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core1 {
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cpu = <&CPU1>;
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};
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core2 {
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cpu = <&CPU2>;
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};
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core3 {
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cpu = <&CPU3>;
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};
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core4 {
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cpu = <&CPU4>;
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};
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core5 {
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cpu = <&CPU5>;
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};
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};
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cluster1 {
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core0 {
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cpu = <&CPU6>;
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};
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core1 {
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cpu = <&CPU7>;
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};
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};
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};
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};
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reserved_memory: reserved-memory { };
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soc: soc { };
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};
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&soc {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0 0 0xffffffff>;
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compatible = "simple-bus";
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intc: interrupt-controller@16000000 {
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compatible = "arm,gic-v3";
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#interrupt-cells = <3>;
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interrupt-controller;
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#redistributor-regions = <1>;
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redistributor-stride = <0x0 0x40000>;
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reg = <0x16000000 0x10000>, /* GICD */
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<0x16080000 0x200000>; /* GICR * 8 */
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interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
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};
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memtimer: timer@16800000 {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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compatible = "arm,armv7-timer-mem";
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reg = <0x16800000 0x1000>;
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clock-frequency = <19200000>;
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frame@16801000 {
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frame-number = <0>;
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interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x16801000 0x1000>,
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<0x16802000 0x1000>;
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};
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frame@16803000 {
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frame-number = <1>;
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interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x16803000 0x1000>;
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status = "disabled";
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};
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frame@16805000 {
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frame-number = <2>;
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interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x16805000 0x1000>;
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status = "disabled";
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};
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frame@16807000 {
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frame-number = <3>;
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interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x16807000 0x1000>;
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status = "disabled";
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};
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frame@16809000 {
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frame-number = <4>;
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interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x16809000 0x1000>;
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status = "disabled";
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};
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frame@1680b000 {
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frame-number = <5>;
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interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x1680b000 0x1000>;
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status = "disabled";
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};
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frame@1680d000 {
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frame-number = <6>;
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interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x1680d000 0x1000>;
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status = "disabled";
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};
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};
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arch_timer: timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
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clock-frequency = <19200000>;
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};
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};
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&reserved_memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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gunyah_hyp_mem: gunyah_hyp_region@80000000 {
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no-map;
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reg = <0x0 0x80000000 0x0 0xe00000>;
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};
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cpusys_vm_mem: cpusys_vm_region@80e00000 {
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no-map;
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reg = <0x0 0x80e00000 0x0 0x400000>;
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};
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cpucp_mem: cpucp_region@81200000 {
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no-map;
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reg = <0x0 0x81200000 0x0 0x200000>;
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};
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/*
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* hyp_tags_mem is dynamically removed from the RAM
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* partition tables before boot occurs. Size of region
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* varies.
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*/
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/* merged xbl_dtlog, xbl_ramdump and aop_image regions */
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xbl_aop_merged_mem: xbl_aop_merged_region@81a00000 {
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no-map;
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reg = <0x0 0x81a00000 0x0 0x260000>;
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};
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aop_cmd_db_mem: aop_cmd_db_region@81c60000 {
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compatible = "qcom,cmd-db";
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no-map;
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reg = <0x0 0x81c60000 0x0 0x20000>;
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};
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/* merged aop_config, tme_crash_dump, tme_log and uefi_log regions */
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aop_tme_uefi_merged_mem: aop_tme_uefi_merged_region@81c80000 {
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no-map;
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reg = <0x0 0x81c80000 0x0 0x74000>;
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};
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/* secdata region can be reused by apps */
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smem_mem: smem_region@81d00000 {
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no-map;
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reg = <0x0 0x81d00000 0x0 0x200000>;
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};
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adsp_mhi_mem: adsp_mhi_region@81f00000 {
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no-map;
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reg = <0x0 0x81f00000 0x0 0x20000>;
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};
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cpucp_scandump_mem: cpucp_scandump_region@81f20000 {
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no-map;
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reg = <0x0 0x81f20000 0x0 0x380000>;
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};
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pdp_ns_shared_mem: pdp_ns_shared_region@822a0000 {
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no-map;
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reg = <0x0 0x822a0000 0x0 0x100000>;
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};
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soccp_sdi_mem: soccp_sdi_region@823a0000 {
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no-map;
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reg = <0x0 0x823a0000 0x0 0x40000>;
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};
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pmic_minii_dump_mem: pmic_minii_dump_region@823e0000 {
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no-map;
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reg = <0x0 0x823e0000 0x0 0x80000>;
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};
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pvm_fw_mem: pvm_fw_region@824a0000 {
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no-map;
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reg = <0x0 0x824a0000 0x0 0x100000>;
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};
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/* hyp_mem_database_mem is removed by HYP in the RAM partition table */
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global_sync_mem: global_sync_region@82600000 {
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no-map;
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reg = <0x0 0x82600000 0x0 0x100000>;
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};
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tz_stat_mem: tz_stat_region@82700000 {
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no-map;
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reg = <0x0 0x82700000 0x0 0x100000>;
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};
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qdss_apps_mem: qdss_apps_region@82800000 {
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compatible = "shared-dma-pool";
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reg = <0x0 0x82800000 0x0 0x2000000>;
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reusable;
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};
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dsm_partition_1_mem: dsm_partition_1_region@86b00000 {
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no-map;
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reg = <0x0 0x86b00000 0x0 0x4900000>;
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};
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dsm_partition_2_mem: dsm_partition_2_region@8b400000 {
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no-map;
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reg = <0x0 0x8b400000 0x0 0x800000>;
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};
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mpss_mem: mpss_region@8bc00000 {
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no-map;
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reg = <0x0 0x8bc00000 0x0 0xf400000>;
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};
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q6_mpss_dtb_mem: q6_mpss_dtb_region@9b000000 {
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no-map;
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reg = <0x0 0x9b000000 0x0 0x80000>;
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};
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ipa_fw_mem: ipa_fw_region@9b080000 {
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no-map;
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reg = <0x0 0x9b080000 0x0 0x10000>;
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};
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ipa_gsi_mem: ipa_gsi_region@9b090000 {
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no-map;
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reg = <0x0 0x9b090000 0x0 0xa000>;
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};
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gpu_microcode_mem: gpu_microcode_region@9b09a000 {
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no-map;
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reg = <0x0 0x9b09a000 0x0 0x2000>;
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};
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spss_region_mem: spss_region_region@9b100000 {
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no-map;
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reg = <0x0 0x9b100000 0x0 0x180000>;
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};
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spu_secure_shared_memory_mem: spu_secure_shared_memory_region@9b280000 {
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no-map;
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reg = <0x0 0x9b280000 0x0 0x80000>;
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};
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camera_mem: camera_region@9b300000 {
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no-map;
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reg = <0x0 0x9b300000 0x0 0x800000>;
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};
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video_mem: video_region@9bb00000 {
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no-map;
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reg = <0x0 0x9bb00000 0x0 0x800000>;
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};
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cvp_mem: cvp_region@9c300000 {
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no-map;
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reg = <0x0 0x9c300000 0x0 0x700000>;
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};
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cdsp_mem: cdsp_region@9ca00000 {
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no-map;
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reg = <0x0 0x9ca00000 0x0 0x2000000>;
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};
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q6_cdsp_dtb_mem: q6_cdsp_dtb_region@9ea00000 {
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no-map;
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reg = <0x0 0x9ea00000 0x0 0x80000>;
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};
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q6_adsp_dtb_mem: q6_adsp_dtb_region@9ea80000 {
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no-map;
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reg = <0x0 0x9ea80000 0x0 0x80000>;
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};
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adspslpi_mem: adspslpi_region@9eb00000 {
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no-map;
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reg = <0x0 0x9eb00000 0x0 0x4080000>;
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};
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soccp_mem: soccp_region@a2b80000 {
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no-map;
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reg = <0x0 0xa2b80000 0x0 0x100000>;
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};
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/* uefi region can be reused by apps */
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/* Linux kernel image is loaded at 0xa8000000 */
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/* merged tz_reserved, xbl_sc, and qtee regions */
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tz_merged_mem: tz_merged_region@d8000000 {
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no-map;
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reg = <0x0 0xd8000000 0x0 0x600000>;
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};
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/*
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* ta/tags mem is dynamically removed from the RAM
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* partition tables before boot occurs. Size of region
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* varies.
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*/
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trust_ui_vm_mem: trust_ui_vm_region@f3800000 {
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compatible = "shared-dma-pool";
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reg = <0x0 0xf3800000 0x0 0x4400000>;
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reusable;
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alignment = <0x0 0x400000>;
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};
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oem_vm_mem: oem_vm_region@f7c00000 {
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compatible = "shared-dma-pool";
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reg = <0x0 0xf7c00000 0x0 0x4c00000>;
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reusable;
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alignment = <0x0 0x400000>;
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};
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llcc_lpi_mem: llcc_lpi_region@ff800000 {
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no-map;
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reg = <0x0 0xff800000 0x0 0x800000>;
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};
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system_cma: linux,cma {
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compatible = "shared-dma-pool";
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alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
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reusable;
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alignment = <0x0 0x400000>;
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size = <0x0 0x400000>;
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linux,cma-default;
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};
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};
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#include "msm-arm-smmu-sun.dtsi"
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