Replace swr node with default as swr core does not detect. Change-Id: Ibe40453c70867c9687bd01ca9345dae8080bafac Signed-off-by: Ravulapati Vishnu Vardhan Rao <quic_visr@quicinc.com>
187 lines
4.5 KiB
Plaintext
187 lines
4.5 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <bindings/qcom,audio-ext-clk.h>
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#include <bindings/qcom,gpr.h>
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#include "msm-audio-lpass.dtsi"
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&soc {
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spf_core_platform: spf_core_platform {
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compatible = "qcom,spf-core-platform";
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};
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lpass_core_hw_vote: vote_lpass_core_hw {
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compatible = "qcom,audio-ref-clk";
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qcom,codec-ext-clk-src = <AUDIO_LPASS_CORE_HW_VOTE>;
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#clock-cells = <1>;
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};
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lpass_audio_hw_vote: vote_lpass_audio_hw {
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compatible = "qcom,audio-ref-clk";
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qcom,codec-ext-clk-src = <AUDIO_LPASS_AUDIO_HW_VOTE>;
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#clock-cells = <1>;
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};
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};
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&remoteproc_adsp_glink {
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audio_gpr: qcom,gpr {
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compatible = "qcom,gpr";
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qcom,glink-channels = "adsp_apps";
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qcom,intents = <0x200 20>;
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qcom,ch-sched-rt;
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reg = <GPR_DOMAIN_ADSP>;
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spf_core {
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compatible = "qcom,spf_core";
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reg = <GPR_SVC_ADSP_CORE>;
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};
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audio-pkt {
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compatible = "qcom,audio-pkt";
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qcom,audiopkt-ch-name = "apr_audio_svc";
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reg = <GPR_SVC_MAX>;
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};
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audio_prm: q6prm {
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compatible = "qcom,audio_prm";
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qcom,sleep-api-supported = <1>;
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reg = <GPR_SVC_ASM>;
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};
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};
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};
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&spf_core_platform {
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msm_audio_ion: qcom,msm-audio-ion {
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compatible = "qcom,msm-audio-ion";
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qcom,smmu-version = <2>;
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qcom,smmu-enabled;
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iommus = <&apps_smmu 0x1001 0x0080>, <&apps_smmu 0x1041 0x20>;
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memory-region = <&audio_cnss_resv_region>;
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qcom,smmu-sid-mask = /bits/ 64 <0xf>;
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dma-coherent;
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audio_cnss_resv_region: audio_cnss_resv_region {
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iommu-addresses = <&msm_audio_ion 0x00000000 0x18000000>,
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<&msm_audio_ion 0xb0000000 0x50000000>;
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};
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};
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msm_audio_ion_cma: qcom,msm-audio-ion-cma {
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compatible = "qcom,msm-audio-ion-cma";
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};
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lpi_tlmm: lpi_pinctrl@07760000 {
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compatible = "qcom,lpi-pinctrl";
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reg = <0x07760000 0x0>;
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qcom,gpios-count = <23>;
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qcom,slew-reg = <0x07760000 0x0>;
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gpio-controller;
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#gpio-cells = <2>;
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qcom,lpi-offset-tbl = <0x00000000>, <0x00001000>,
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<0x00002000>, <0x00003000>,
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<0x00004000>, <0x00005000>,
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<0x00006000>, <0x00007000>,
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<0x00008000>, <0x00009000>,
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<0x0000A000>, <0x0000B000>,
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<0x0000C000>, <0x0000D000>,
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<0x0000E000>, <0x0000F000>,
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<0x00010000>, <0x00011000>,
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<0x00012000>, <0x00013000>,
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<0x00014000>, <0x00015000>,
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<0x00016000>;
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qcom,lpi-slew-offset-tbl = <0x0000000B>, <0x0000000B>,
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<0x0000000B>, <0x0000000B>,
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<0x0000000B>, <0x0000000B>,
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<0x0000000B>, <0x0000000B>,
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<0x0000000B>, <0x0000000B>,
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<0x0000000B>, <0x0000000B>,
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<0x0000000B>, <0x0000000B>,
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<0x0000000B>, <0x0000000B>,
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<0x0000000B>, <0x0000000B>,
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<0x0000000B>, <0x0000000B>,
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<0x0000000B>, <0x0000000B>,
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<0x0000000B>;
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qcom,lpi-slew-base-tbl = <0x7760000>, <0x7761000>,
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<0x7762000>, <0x7763000>,
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<0x7764000>, <0x7765000>,
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<0x7766000>, <0x7767000>,
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<0x7768000>, <0x7769000>,
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<0x776A000>, <0x776B000>,
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<0x776C000>, <0x776D000>,
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<0x776E000>, <0x776F000>,
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<0x7770000>, <0x7771000>,
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<0x7772000>, <0x7773000>,
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<0x7774000>, <0x7775000>,
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<0x7776000>;
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clock-names = "lpass_core_hw_vote",
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"lpass_audio_hw_vote";
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clocks = <&lpass_core_hw_vote 0>,
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<&lpass_audio_hw_vote 0>;
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};
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lpass_cdc: lpass-cdc {
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compatible = "qcom,lpass-cdc";
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clock-names = "lpass_core_hw_vote",
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"lpass_audio_hw_vote";
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clocks = <&lpass_core_hw_vote 0>,
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<&lpass_audio_hw_vote 0>;
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lpass-cdc-clk-rsc-mngr {
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compatible = "qcom,lpass-cdc-clk-rsc-mngr";
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};
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va_macro: va-macro@7660000 {
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swr2: va_swr_master {
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};
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};
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tx_macro: tx-macro@6AE0000 {
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};
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rx_macro: rx-macro@6AC0000 {
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swr1: rx_swr_master {
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};
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};
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wsa_macro: wsa-macro@6B00000 {
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swr0: wsa_swr_master {
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};
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};
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};
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lpass_bt_swr: lpass_bt_swr@6CA0000 {
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compatible = "qcom,lpass-bt-swr";
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swr4: bt_swr_mstr {
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};
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};
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kera_snd: sound {
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compatible = "qcom,sun-asoc-snd";
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qcom,mi2s-audio-intf = <1>;
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qcom,tdm-audio-intf = <0>;
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qcom,auxpcm-audio-intf = <1>;
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qcom,wcn-bt = <0>;
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qcom,ext-disp-audio-rx = <0>;
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qcom,afe-rxtx-lb = <0>;
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clock-names = "lpass_audio_hw_vote";
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clocks = <&lpass_audio_hw_vote 0>;
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};
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};
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&aliases {
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swr0 = "/soc/spf_core_platform/lpass-cdc/wsa-macro@6B00000/wsa_swr_master";
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swr1 = "/soc/spf_core_platform/lpass-cdc/rx-macro@6AC0000/rx_swr_master";
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swr2 = "/soc/spf_core_platform/lpass-cdc/va-macro@7660000/va_swr_master";
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swr4 = "/soc/spf_core_platform/lpass_bt_swr@6CA0000/bt_swr_mstr";
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};
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&adsp_loader {
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/delete-property/ qcom,adsp-state;
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};
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