8e4ec07539
Ravelin target doesn't support IO coherency. So, remove the coherent property from storage nodes. Don't vote for voltage for regulators shared between eMMC and UFS to be in consistent with UFS design where regulator-min-microvolt and regulator-max-microvolt properties are removed from regulator device tree files for UFS regulators and to avoid below regulator API failures. [3.198613] pm6450_l24: unsupportable voltage range: 2960000-0uV [4.236846] sdhci_msm_vreg_set_voltage: regulator_set_voltage(vdd)failed. min_uV=2960000,max_uV=2960000,ret=-22. Change-Id: I780218b0903887e36589704af3e790a710932dd7 Signed-off-by: kamasali Satyanarayan <quic_kamasali@quicinc.com>
193 lines
4.7 KiB
Plaintext
193 lines
4.7 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include "ravelin-pmic-overlay.dtsi"
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#include "ravelin-pm7250b.dtsi"
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#include "ravelin-thermal-overlay.dtsi"
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&soc {
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};
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&qupv3_se8_i2c {
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awinic@64 {
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reg = <0x64>;
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awinic,red {
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awinic,name = "red";
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awinic,id = <0>;
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awinic,imax = <2>;
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awinic,led-current = <3>;
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awinic,max-brightness = <255>;
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awinic,rise-time-ms = <6>;
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awinic,hold-time-ms = <0>;
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awinic,fall-time-ms = <6>;
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awinic,off-time-ms = <4>;
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};
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awinic,green {
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awinic,name = "green";
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awinic,id = <1>;
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awinic,imax = <2>;
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awinic,led-current = <3>;
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awinic,max-brightness = <255>;
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awinic,rise-time-ms = <6>;
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awinic,hold-time-ms = <0>;
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awinic,fall-time-ms = <6>;
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awinic,off-time-ms = <4>;
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};
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awinic,blue {
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awinic,name = "blue";
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awinic,id = <2>;
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awinic,imax = <2>;
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awinic,led-current = <3>;
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awinic,max-brightness = <255>;
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awinic,rise-time-ms = <6>;
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awinic,hold-time-ms = <0>;
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awinic,fall-time-ms = <6>;
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awinic,off-time-ms = <4>;
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};
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};
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};
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&qupv3_se1_i2c {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "ok";
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qcom,i2c-touch-active = "focaltech,fts_ts";
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focaltech@38 {
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reg = <0x38>;
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interrupt-parent = <&tlmm>;
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interrupts = <13 0x2008>;
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focaltech,reset-gpio = <&tlmm 12 0x00>;
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focaltech,irq-gpio = <&tlmm 13 0x2008>;
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focaltech,display-coords = <0 0 1080 2408>;
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focaltech,max-touch-number = <10>;
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focaltech,ic-type = <0x8726081C>;
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focaltech,touch-type = "primary";
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pinctrl-names = "pmx_ts_active","pmx_ts_suspend","pmx_ts_release";
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pinctrl-0 = <&ts_active>;
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pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
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pinctrl-2 = <&ts_release>;
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focaltech,trusted-touch-mode = "vm_mode";
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focaltech,touch-environment = "pvm";
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focaltech,trusted-touch-type = "primary";
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focaltech,trusted-touch-spi-irq = <566>;
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focaltech,trusted-touch-io-bases = <0x984000 0x910000>;
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focaltech,trusted-touch-io-sizes = <0x1000 0x4000>;
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focaltech,trusted-touch-vm-gpio-list = <&tlmm 10 0 &tlmm 11 0
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&tlmm 12 0 &tlmm 13 0x2008>;
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};
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};
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&sdhc_1 {
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status = "ok";
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vdd-supply = <&L5E>;
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qcom,vdd-current-level = <0 570000>;
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vdd-io-supply = <&L19B>;
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qcom,vdd-io-always-on;
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qcom,vdd-io-lpm-sup;
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qcom,vdd-io-current-level = <0 325000>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&sdc1_on>;
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pinctrl-1 = <&sdc1_off>;
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};
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&sdhc_2 {
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status = "ok";
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vdd-supply = <&L24B>;
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qcom,vdd-current-level = <0 800000>;
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/*
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* min/max voltages are voted on L24B/L28B and L24B/L28B_PBS
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* regulators will only be voted for enabling/disabling conditions
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* to support FR84471 for chipsets where PMIC doesn't support
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* PBS ram sequence to turn OFF regulators automatically on
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* multicard tray removal and these new regulator resources are
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* exposed by PMIC team as part of this FR.
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*/
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vdd-en-dis-supply = <&L24B_PBS>;
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vdd-io-supply = <&L28B>;
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qcom,vdd-io-voltage-level = <1800000 2960000>;
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qcom,vdd-io-current-level = <0 22000>;
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vdd-io-en-dis-supply = <&L28B_PBS>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&sdc2_on>;
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pinctrl-1 = <&sdc2_off>;
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cd-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>;
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};
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&ufsphy_mem {
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/*
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* Here parrot phy is used for ravelin as it
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* do not have its own list for module load and
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* hence compatible is using parrot.
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* We have plan to improve this by making phy binary
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* target independent.
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*/
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compatible = "qcom,ufs-phy-qmp-v4-waipio";
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vdda-phy-supply = <&L5B>;
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vdda-pll-supply = <&L16B>;
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vdda-phy-max-microamp = <88530>;
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vdda-pll-max-microamp = <18310>;
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status = "ok";
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};
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&ufshc_mem {
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vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
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vcc-supply = <&L5E>;
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vcc-max-microamp = <1056000>;
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vccq-supply = <&L13B>;
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vccq-max-microamp = <750000>;
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vccq2-supply = <&L19B>;
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vccq2-max-microamp = <750000>;
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qcom,vddp-ref-clk-supply = <&L13B>;
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qcom,vddp-ref-clk-max-microamp = <100>;
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/*
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* ufs-dev-types and nvmem entries are for ufs device
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* identification using nvmem interface. Use number of
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* ufs devices supported for ufs-dev-types, and nvmem handle
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* added by pmic for sdam register.
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*
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* Default value taken by driver is bit[0] = 0 for 3.x and
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* bit[0] = 1 for 2.x driver code takes this as default case.
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*
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* But Bit value to identify ufs device is not consistent
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* across the targets it could be bit[0] = 0/1 for UFS2.x/3x
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* and vice versa. If the bit[0] value is not same as default
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* value used in driver and if its reverted then use flag
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* qcom,ufs-dev-revert to identify ufs device.
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*/
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ufs-dev-types = <2>;
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qcom,ufs-dev-revert;
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nvmem-cells = <&ufs_dev>, <&boot_config>;
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nvmem-cell-names = "ufs_dev", "boot_conf";
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status = "ok";
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};
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&battery_charger {
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qcom,thermal-mitigation-step = <500000>;
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qcom,wireless-charging-not-supported;
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};
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