d04fa7ba64
Needed for SPU pil on sun dtsi. Remoteproc-spss, spcom and spss_utils are disabled. Change-Id: I97519bacccee2f7094edbcf32e3fdac29d67ac77 Signed-off-by: Nurit Lichtenstein <quic_nuritl@quicinc.com>
36 lines
1.1 KiB
YAML
36 lines
1.1 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/qcom/qcom, spcom.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Secure Proccessor Communication (spcom)
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maintainers:
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- Nurit Lichtenstein <quic_nuritl@quicinc.com>
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description: |
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This document defines the binding for a component that implements the secure processor communication.
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required:
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- compatible
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- qcom,spcom-ch-names
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- qcom,spcom-sp2soc-rmb-reg-addr
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- qcom,spcom-sp2soc-rmb-initdone-bit
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- qcom,spcom-sp2soc-rmb-pbldone-bit
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- qcom,spcom-soc2sp-rmb-reg-addr
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- qcom,spcom-soc2sp-rmb-sp-ssr-bit
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examples:
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#The following example represents the spcom node on a sun device.
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- |
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qcom,spcom {
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compatible = "qcom,spcom";
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qcom,spcom-ch-names = "sp_kernel" , "sp_ssr";
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qcom,spcom-sp2soc-rmb-reg-addr = <0x01881020>;
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qcom,spcom-sp2soc-rmb-initdone-bit = <24>;
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qcom,spcom-sp2soc-rmb-pbldone-bit = <25>;
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qcom,spcom-soc2sp-rmb-reg-addr = <0x01881030>;
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qcom,spcom-soc2sp-rmb-sp-ssr-bit = <0>;
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};
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