1fa42c98bd
Add documentation for dcc and memory-dump driver. Change-Id: Iadca5ac385af2f79c8f8449cd5a538f24815b436 Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
47 lines
1010 B
YAML
47 lines
1010 B
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/soc/qcom/qcom,dcc.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: The document describes the device tree binding for qcom dcc.
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maintainers:
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- Yuanfang Zhang <quic_yuanfang@quicinc.com>
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description:
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DCC driver provides interface to configure DCC block and read back captured
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data from DCC's internal SRAM.
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properties:
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compatible:
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items:
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- const: qcom,dcc-v2
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reg:
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maxItems: 2
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description:
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physical base address and length of the register set(s), SRAM of the component.
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reg-names:
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minItems: 2
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items:
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- const: dcc-base
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- const: dcc-ram-base
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required:
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- compatible
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- reg
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- reg-manes
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additionalProperties: false
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examples:
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- |
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dcc@4b3000 {
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compatible = "qcom,dcc-v2";
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reg = <0x4b3000 0x1000>,
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<0x4b4000 0x2000>;
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reg-names = "dcc-base", "dcc-ram-base";
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};
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