6f18ce8026
Add snapshot of device tree bindings from keystone common kernel, branch
"android-mainline-keystone-qcom-release" at c4c12103f9c0 ("Snap for 9228065
from e32903b9a63bb558df8b803b076619c53c16baad to
android-mainline-keystone-qcom-release").
Change-Id: I7682079615cbd9f29340a5c1f2a1d84ec441a1f1
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
76 lines
1.8 KiB
YAML
76 lines
1.8 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/sound/qcom,q6dsp-lpass-clocks.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Qualcomm DSP LPASS Clock Controller binding
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maintainers:
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- Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
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description: |
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This binding describes the Qualcomm DSP Clock Controller
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properties:
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compatible:
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enum:
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- qcom,q6afe-clocks
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- qcom,q6prm-lpass-clocks
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'#clock-cells':
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const: 2
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description:
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Clock Id is followed by clock coupling attributes.
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1 = for no coupled clock
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2 = for dividend of the coupled clock
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3 = for divisor of the coupled clock
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4 = for inverted and no couple clock
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required:
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- compatible
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- "#clock-cells"
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/soc/qcom,apr.h>
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#include <dt-bindings/sound/qcom,q6afe.h>
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apr {
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compatible = "qcom,apr-v2";
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qcom,domain = <APR_DOMAIN_ADSP>;
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#address-cells = <1>;
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#size-cells = <0>;
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service@4 {
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compatible = "qcom,q6afe";
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reg = <APR_SVC_AFE>;
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qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
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clock-controller {
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compatible = "qcom,q6afe-clocks";
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#clock-cells = <2>;
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};
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};
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};
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- |
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#include <dt-bindings/soc/qcom,gpr.h>
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gpr {
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compatible = "qcom,gpr";
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qcom,domain = <GPR_DOMAIN_ID_ADSP>;
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#address-cells = <1>;
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#size-cells = <0>;
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service@2 {
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reg = <GPR_PRM_MODULE_IID>;
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compatible = "qcom,q6prm";
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clock-controller {
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compatible = "qcom,q6prm-lpass-clocks";
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#clock-cells = <2>;
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};
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};
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};
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