6f18ce8026
Add snapshot of device tree bindings from keystone common kernel, branch
"android-mainline-keystone-qcom-release" at c4c12103f9c0 ("Snap for 9228065
from e32903b9a63bb558df8b803b076619c53c16baad to
android-mainline-keystone-qcom-release").
Change-Id: I7682079615cbd9f29340a5c1f2a1d84ec441a1f1
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
70 lines
1.7 KiB
YAML
70 lines
1.7 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8996.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Global Clock & Reset Controller Binding for MSM8996
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maintainers:
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- Stephen Boyd <sboyd@kernel.org>
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- Taniya Das <tdas@codeaurora.org>
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description: |
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Qualcomm global clock control module which supports the clocks, resets and
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power domains on MSM8996.
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See also:
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- dt-bindings/clock/qcom,gcc-msm8996.h
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properties:
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compatible:
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const: qcom,gcc-msm8996
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clocks:
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minItems: 3
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items:
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- description: XO source
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- description: Second XO source
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- description: Sleep clock source
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- description: PCIe 0 PIPE clock (optional)
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- description: PCIe 1 PIPE clock (optional)
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- description: PCIe 2 PIPE clock (optional)
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- description: USB3 PIPE clock (optional)
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- description: UFS RX symbol 0 clock (optional)
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- description: UFS RX symbol 1 clock (optional)
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- description: UFS TX symbol 0 clock (optional)
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clock-names:
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minItems: 3
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items:
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- const: cxo
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- const: cxo2
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- const: sleep_clk
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- const: pcie_0_pipe_clk_src
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- const: pcie_1_pipe_clk_src
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- const: pcie_2_pipe_clk_src
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- const: usb3_phy_pipe_clk_src
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- const: ufs_rx_symbol_0_clk_src
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- const: ufs_rx_symbol_1_clk_src
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- const: ufs_tx_symbol_0_clk_src
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required:
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- compatible
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allOf:
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- $ref: qcom,gcc.yaml#
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unevaluatedProperties: false
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examples:
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- |
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clock-controller@300000 {
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compatible = "qcom,gcc-msm8996";
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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reg = <0x300000 0x90000>;
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};
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...
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