6d22735217
Add focaltech touch support to ravelin vm. Change-Id: Ie3c1399541929f6b0a3059ee41689b3f5ddc4a7d Signed-off-by: Balaji Vekatesh Kalkonda <quic_bkalkond@quicinc.com>
1414 lines
23 KiB
Plaintext
1414 lines
23 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
|
|
/*
|
|
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
|
*/
|
|
|
|
&soc {
|
|
tlmm: pinctrl@f000000 {
|
|
compatible = "qcom,ravelin-tlmm";
|
|
reg = <0xf000000 0x1000000>;
|
|
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
wakeup-parent = <&pdc>;
|
|
qcom,gpios-reserved = <0 1 2 3>;
|
|
|
|
qupv3_se7_2uart_pins: qupv3_se7_2uart_pins {
|
|
qupv3_se7_2uart_tx_active: qupv3_se7_2uart_tx_active {
|
|
mux {
|
|
pins = "gpio22";
|
|
function = "qup1_se2_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio22";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_2uart_rx_active: qupv3_se7_2uart_rx_active {
|
|
mux {
|
|
pins = "gpio23";
|
|
function = "qup1_se2_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio23";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_2uart_sleep: qupv3_se7_2uart_sleep {
|
|
mux {
|
|
pins = "gpio22", "gpio23";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio22", "gpio23";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se2_4uart_pins: qupv3_se2_4uart_pins {
|
|
qupv3_se2_default_cts: qupv3_se2_default_cts {
|
|
mux {
|
|
pins = "gpio14";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio14";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se2_default_rts: qupv3_se2_default_rts {
|
|
mux {
|
|
pins = "gpio15";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio15";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se2_default_tx: qupv3_se2_default_tx {
|
|
mux {
|
|
pins = "gpio16";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio16";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se2_default_rx: qupv3_se2_default_rx {
|
|
mux {
|
|
pins = "gpio17";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio17";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se2_cts: qupv3_se2_cts {
|
|
mux {
|
|
pins = "gpio14";
|
|
function = "qup0_se2_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio14";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se2_rts: qupv3_se2_rts {
|
|
mux {
|
|
pins = "gpio15";
|
|
function = "qup0_se2_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio15";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se2_tx: qupv3_se2_tx {
|
|
mux {
|
|
pins = "gpio16";
|
|
function = "qup0_se2_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio16";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se2_rx: qupv3_se2_rx {
|
|
mux {
|
|
pins = "gpio17";
|
|
function = "qup0_se2_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio17";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se0_2uart_pins: qupv3_se0_2uart_pins {
|
|
qupv3_se0_2uart_tx_active: qupv3_se0_2uart_tx_active {
|
|
mux {
|
|
pins = "gpio34";
|
|
function = "qup0_se0_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio34";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se0_2uart_rx_active: qupv3_se0_2uart_rx_active {
|
|
mux {
|
|
pins = "gpio35";
|
|
function = "qup0_se0_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio35";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se0_2uart_sleep: qupv3_se0_2uart_sleep {
|
|
mux {
|
|
pins = "gpio34", "gpio35";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio34", "gpio35";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se0_i2c_pins: qupv3_se0_i2c_pins {
|
|
qupv3_se0_i2c_sda_active: qupv3_se0_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio4";
|
|
function = "qup0_se0_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio4";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se0_i2c_scl_active: qupv3_se0_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio5";
|
|
function = "qup0_se0_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio5";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se0_i2c_sleep: qupv3_se0_i2c_sleep {
|
|
mux {
|
|
pins = "gpio4", "gpio5";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio4", "gpio5";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se1_i2c_pins: qupv3_se1_i2c_pins {
|
|
qupv3_se1_i2c_sda_active: qupv3_se1_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio10";
|
|
function = "qup0_se1_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio10";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se1_i2c_scl_active: qupv3_se1_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio11";
|
|
function = "qup0_se1_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio11";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se1_i2c_sleep: qupv3_se1_i2c_sleep {
|
|
mux {
|
|
pins = "gpio10", "gpio11";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio10", "gpio11";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se1_spi_pins: qupv3_se1_spi_pins {
|
|
qupv3_se1_spi_miso_active: qupv3_se1_spi_miso_active {
|
|
mux {
|
|
pins = "gpio10";
|
|
function = "qup0_se1_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio10";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se1_spi_mosi_active: qupv3_se1_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio11";
|
|
function = "qup0_se1_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio11";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se1_spi_clk_active: qupv3_se1_spi_clk_active {
|
|
mux {
|
|
pins = "gpio12";
|
|
function = "qup0_se1_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se1_spi_cs_active: qupv3_se1_spi_cs_active {
|
|
mux {
|
|
pins = "gpio13";
|
|
function = "qup0_se1_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio13";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se1_spi_sleep: qupv3_se1_spi_sleep {
|
|
mux {
|
|
pins = "gpio10", "gpio11",
|
|
"gpio12", "gpio13";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio10", "gpio11",
|
|
"gpio12", "gpio13";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se3_i2c_pins: qupv3_se3_i2c_pins {
|
|
qupv3_se3_i2c_sda_active: qupv3_se3_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio18";
|
|
function = "qup0_se3_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio18";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se3_i2c_scl_active: qupv3_se3_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio19";
|
|
function = "qup0_se3_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio19";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se3_i2c_sleep: qupv3_se3_i2c_sleep {
|
|
mux {
|
|
pins = "gpio18", "gpio19";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio18", "gpio19";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se3_spi_pins: qupv3_se3_spi_pins {
|
|
qupv3_se3_spi_miso_active: qupv3_se3_spi_miso_active {
|
|
mux {
|
|
pins = "gpio18";
|
|
function = "qup0_se3_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio18";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se3_spi_mosi_active: qupv3_se3_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio19";
|
|
function = "qup0_se3_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio19";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se3_spi_clk_active: qupv3_se3_spi_clk_active {
|
|
mux {
|
|
pins = "gpio20";
|
|
function = "qup0_se3_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio20";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se3_spi_cs_active: qupv3_se3_spi_cs_active {
|
|
mux {
|
|
pins = "gpio21";
|
|
function = "qup0_se3_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio21";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se3_spi_sleep: qupv3_se3_spi_sleep {
|
|
mux {
|
|
pins = "gpio18", "gpio19",
|
|
"gpio20", "gpio21";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio18", "gpio19",
|
|
"gpio20", "gpio21";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se4_i2c_pins: qupv3_se4_i2c_pins {
|
|
qupv3_se4_i2c_sda_active: qupv3_se4_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio8";
|
|
function = "qup0_se4_l0_mira";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio8";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_i2c_scl_active: qupv3_se4_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio9";
|
|
function = "qup0_se4_l1_mira";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio9";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_i2c_sleep: qupv3_se4_i2c_sleep {
|
|
mux {
|
|
pins = "gpio8", "gpio9";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio8", "gpio9";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_pins: qupv3_se4_spi_pins {
|
|
qupv3_se4_spi_miso_active: qupv3_se4_spi_miso_active {
|
|
mux {
|
|
pins = "gpio8";
|
|
function = "qup0_se4_l0_mira";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio8";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_mosi_active: qupv3_se4_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio9";
|
|
function = "qup0_se4_l1_mira";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio9";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_clk_active: qupv3_se4_spi_clk_active {
|
|
mux {
|
|
pins = "gpio6";
|
|
function = "qup0_se4_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio6";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_cs_active: qupv3_se4_spi_cs_active {
|
|
mux {
|
|
pins = "gpio7";
|
|
function = "qup0_se4_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio7";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_sleep: qupv3_se4_spi_sleep {
|
|
mux {
|
|
pins = "gpio8", "gpio9",
|
|
"gpio6", "gpio7";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio8", "gpio9",
|
|
"gpio6", "gpio7";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se5_i2c_pins: qupv3_se5_i2c_pins {
|
|
qupv3_se5_i2c_sda_active: qupv3_se5_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio0";
|
|
function = "qup1_se0_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_i2c_scl_active: qupv3_se5_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio1";
|
|
function = "qup1_se0_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio1";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_i2c_sleep: qupv3_se5_i2c_sleep {
|
|
mux {
|
|
pins = "gpio0", "gpio1";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0", "gpio1";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_pins: qupv3_se5_spi_pins {
|
|
qupv3_se5_spi_miso_active: qupv3_se5_spi_miso_active {
|
|
mux {
|
|
pins = "gpio0";
|
|
function = "qup1_se0_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_mosi_active: qupv3_se5_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio1";
|
|
function = "qup1_se0_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio1";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_clk_active: qupv3_se5_spi_clk_active {
|
|
mux {
|
|
pins = "gpio2";
|
|
function = "qup1_se0_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio2";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_cs_active: qupv3_se5_spi_cs_active {
|
|
mux {
|
|
pins = "gpio3";
|
|
function = "qup1_se0_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio3";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_sleep: qupv3_se5_spi_sleep {
|
|
mux {
|
|
pins = "gpio0", "gpio1",
|
|
"gpio2", "gpio3";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0", "gpio1",
|
|
"gpio2", "gpio3";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se6_i2c_pins: qupv3_se6_i2c_pins {
|
|
qupv3_se6_i2c_sda_active: qupv3_se6_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio50";
|
|
function = "qup1_se1_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio50";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_i2c_scl_active: qupv3_se6_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio51";
|
|
function = "qup1_se1_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio51";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_i2c_sleep: qupv3_se6_i2c_sleep {
|
|
mux {
|
|
pins = "gpio50", "gpio51";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio50", "gpio51";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_pins: qupv3_se6_spi_pins {
|
|
qupv3_se6_spi_miso_active: qupv3_se6_spi_miso_active {
|
|
mux {
|
|
pins = "gpio50";
|
|
function = "qup1_se1_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio50";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_mosi_active: qupv3_se6_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio51";
|
|
function = "qup1_se1_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio51";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_clk_active: qupv3_se6_spi_clk_active {
|
|
mux {
|
|
pins = "gpio26";
|
|
function = "qup1_se1_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio26";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_cs_active: qupv3_se6_spi_cs_active {
|
|
mux {
|
|
pins = "gpio27";
|
|
function = "qup1_se1_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio27";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_sleep: qupv3_se6_spi_sleep {
|
|
mux {
|
|
pins = "gpio50", "gpio51",
|
|
"gpio26", "gpio27";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio50", "gpio51",
|
|
"gpio26", "gpio27";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se8_i2c_pins: qupv3_se8_i2c_pins {
|
|
qupv3_se8_i2c_sda_active: qupv3_se8_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio24";
|
|
function = "qup1_se3_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio24";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_i2c_scl_active: qupv3_se8_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio25";
|
|
function = "qup1_se3_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio25";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_i2c_sleep: qupv3_se8_i2c_sleep {
|
|
mux {
|
|
pins = "gpio24", "gpio25";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio24", "gpio25";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se8_spi_pins: qupv3_se8_spi_pins {
|
|
qupv3_se8_spi_miso_active: qupv3_se8_spi_miso_active {
|
|
mux {
|
|
pins = "gpio24";
|
|
function = "qup1_se3_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio24";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_spi_mosi_active: qupv3_se8_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio25";
|
|
function = "qup1_se3_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio25";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_spi_clk_active: qupv3_se8_spi_clk_active {
|
|
mux {
|
|
pins = "gpio51";
|
|
function = "qup1_se3_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio51";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_spi_cs_active: qupv3_se8_spi_cs_active {
|
|
mux {
|
|
pins = "gpio50";
|
|
function = "qup1_se3_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio50";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_spi_sleep: qupv3_se8_spi_sleep {
|
|
mux {
|
|
pins = "gpio24", "gpio25",
|
|
"gpio51", "gpio50";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio24", "gpio25",
|
|
"gpio51", "gpio50";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se9_i2c_pins: qupv3_se9_i2c_pins {
|
|
qupv3_se9_i2c_sda_active: qupv3_se9_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio91";
|
|
function = "qup1_se4_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio91";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_i2c_scl_active: qupv3_se9_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio90";
|
|
function = "qup1_se4_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio90";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_i2c_sleep: qupv3_se9_i2c_sleep {
|
|
mux {
|
|
pins = "gpio91", "gpio90";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio91", "gpio90";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se9_spi_pins: qupv3_se9_spi_pins {
|
|
qupv3_se9_spi_miso_active: qupv3_se9_spi_miso_active {
|
|
mux {
|
|
pins = "gpio91";
|
|
function = "qup1_se4_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio91";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_spi_mosi_active: qupv3_se9_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio90";
|
|
function = "qup1_se4_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio90";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_spi_clk_active: qupv3_se9_spi_clk_active {
|
|
mux {
|
|
pins = "gpio48";
|
|
function = "qup1_se4_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_spi_cs_active: qupv3_se9_spi_cs_active {
|
|
mux {
|
|
pins = "gpio43";
|
|
function = "qup1_se4_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio43";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_spi_sleep: qupv3_se9_spi_sleep {
|
|
mux {
|
|
pins = "gpio91", "gpio90",
|
|
"gpio48", "gpio43";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio91", "gpio90",
|
|
"gpio48", "gpio43";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
/* WSA speaker reset pins */
|
|
spkr_1_sd_n {
|
|
spkr_1_sd_n_sleep: spkr_1_sd_n_sleep {
|
|
mux {
|
|
pins = "gpio99";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio99";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down;
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
spkr_1_sd_n_active: spkr_1_sd_n_active {
|
|
mux {
|
|
pins = "gpio99";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio99";
|
|
drive-strength = <16>; /* 16 mA */
|
|
bias-disable;
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
spkr_2_sd_n {
|
|
spkr_2_sd_n_sleep: spkr_2_sd_n_sleep {
|
|
mux {
|
|
pins = "gpio100";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio100";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down;
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
spkr_2_sd_n_active: spkr_2_sd_n_active {
|
|
mux {
|
|
pins = "gpio100";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio100";
|
|
drive-strength = <16>; /* 16 mA */
|
|
bias-disable;
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
/* WCD reset pin */
|
|
wcd_reset_active: wcd_reset_active {
|
|
mux {
|
|
pins = "gpio96";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio96";
|
|
drive-strength = <16>;
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
wcd_reset_sleep: wcd_reset_sleep {
|
|
mux {
|
|
pins = "gpio96";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio96";
|
|
drive-strength = <16>;
|
|
bias-disable;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
sdc1_on: sdc1_on {
|
|
clk {
|
|
pins = "sdc1_clk";
|
|
bias-disable;
|
|
drive-strength = <16>;
|
|
};
|
|
|
|
cmd {
|
|
pins = "sdc1_cmd";
|
|
bias-pull-up;
|
|
drive-strength = <10>;
|
|
};
|
|
|
|
data {
|
|
pins = "sdc1_data";
|
|
bias-pull-up;
|
|
drive-strength = <10>;
|
|
};
|
|
|
|
rclk {
|
|
pins = "sdc1_rclk";
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
sdc1_off: sdc1_off {
|
|
clk {
|
|
pins = "sdc1_clk";
|
|
bias-disable;
|
|
drive-strength = <2>;
|
|
};
|
|
|
|
cmd {
|
|
pins = "sdc1_cmd";
|
|
bias-pull-up;
|
|
drive-strength = <2>;
|
|
};
|
|
|
|
data {
|
|
pins = "sdc1_data";
|
|
bias-pull-up;
|
|
drive-strength = <2>;
|
|
};
|
|
|
|
rclk {
|
|
pins = "sdc1_rclk";
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
sdc2_on: sdc2_on {
|
|
clk {
|
|
pins = "sdc2_clk";
|
|
bias-disable;
|
|
drive-strength = <16>;
|
|
};
|
|
|
|
cmd {
|
|
pins = "sdc2_cmd";
|
|
bias-pull-up;
|
|
drive-strength = <10>;
|
|
};
|
|
|
|
data {
|
|
pins = "sdc2_data";
|
|
bias-pull-up;
|
|
drive-strength = <10>;
|
|
};
|
|
|
|
sd-cd {
|
|
pins = "gpio101";
|
|
bias-pull-up;
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
|
|
sdc2_off: sdc2_off {
|
|
clk {
|
|
pins = "sdc2_clk";
|
|
bias-disable;
|
|
drive-strength = <2>;
|
|
};
|
|
|
|
cmd {
|
|
pins = "sdc2_cmd";
|
|
bias-pull-up;
|
|
drive-strength = <2>;
|
|
};
|
|
|
|
data {
|
|
pins = "sdc2_data";
|
|
bias-pull-up;
|
|
drive-strength = <2>;
|
|
};
|
|
|
|
sd-cd {
|
|
pins = "gpio101";
|
|
bias-pull-up;
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
|
|
trigout_a: trigout_a {
|
|
mux {
|
|
pins = "gpio26";
|
|
function = "qdss_cti";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio26";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
/* touchscreen pins */
|
|
pmx_ts_active {
|
|
ts_active: ts_active {
|
|
mux {
|
|
pins = "gpio12", "gpio13";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12", "gpio13";
|
|
drive-strength = <8>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
ts_spi_active: ts_spi_active {
|
|
mux {
|
|
pins = "gpio90", "gpio91";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio90", "gpio91";
|
|
drive-strength = <8>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_reset_suspend {
|
|
ts_reset_suspend: ts_reset_suspend {
|
|
mux {
|
|
pins = "gpio12";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
ts_spi_reset_suspend: ts_spi_reset_suspend {
|
|
mux {
|
|
pins = "gpio90";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio90";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_int_suspend {
|
|
ts_int_suspend: ts_int_suspend {
|
|
mux {
|
|
pins = "gpio13";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio13";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
ts_spi_int_suspend: ts_spi_int_suspend {
|
|
mux {
|
|
pins = "gpio91";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio91";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_release {
|
|
ts_release: ts_release {
|
|
mux {
|
|
pins = "gpio12", "gpio13";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12", "gpio13";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
ts_spi_release: ts_spi_release {
|
|
mux {
|
|
pins = "gpio90", "gpio91";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio90", "gpio91";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
pcie0 {
|
|
pcie0_perst_default: pcie0_perst_default {
|
|
mux {
|
|
pins = "gpio32";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio32";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
pcie0_clkreq_default: pcie0_clkreq_default {
|
|
mux {
|
|
pins = "gpio107";
|
|
function = "pcie0_clk_req";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio107";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
pcie0_wake_default: pcie0_wake_default {
|
|
mux {
|
|
pins = "gpio31";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio31";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
pcie0_clkreq_sleep: pcie0_clkreq_sleep {
|
|
mux {
|
|
pins = "gpio107";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio107";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
};
|
|
|
|
usb_phy_ps: usb_phy_ps {
|
|
usb3phy_portselect_default: usb3phy_portselect_default {
|
|
mux {
|
|
pins = "gpio94";
|
|
function = "usb0_phy_ps";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio94";
|
|
bias-disable;
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tlmm-vm-mem-access {
|
|
compatible = "qcom,tlmm-vm-mem-access";
|
|
qcom,master;
|
|
tuivm {
|
|
qcom,label = <0x08>;
|
|
qcom,vmid = <45>;
|
|
tlmm-vm-gpio-list = <&tlmm 92 0 &tlmm 93 0 &tlmm 10 0 &tlmm 11 0 &tlmm 12 0 &tlmm 13 0x2008>;
|
|
};
|
|
};
|
|
};
|