6c074a4b4c
Set regulator-always-on for VDD_MMCX and VDD_MXC on Sun RUMI. This ensures that clock controller register values are maintained since RUMI isn't simulating register retention across VDD_MMCX or VDD_MXC power collapse. Change-Id: I5adaa243066df64f6f04f569a05eb124734d7611 Signed-off-by: Xubin Bai <quic_xubibai@quicinc.com>
135 lines
2.5 KiB
Plaintext
135 lines
2.5 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/clock/qcom,gcc-pineapple.h>
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#include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>
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&reserved_memory {
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spintable: spintable_region@90000000 {
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no-map;
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reg = <0x0 0x90000000 0x0 0x100000>;
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};
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};
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&arch_timer {
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clock-frequency = <500000>;
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};
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&memtimer {
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clock-frequency = <500000>;
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};
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&qupv3_se7_2uart {
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qcom,rumi_platform;
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};
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&soc {
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usb_nop_phy: usb_nop_phy {
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compatible = "usb-nop-xceiv";
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};
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usb_emuphy: phy@a784000 {
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compatible = "qcom,usb-emu-phy";
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reg = <0x0a784000 0x9500>;
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qcom,emu-init-seq = <0xfffff 0x4
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0xffff0 0x4
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0x100000 0x20
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0x0 0x20
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0x000101F0 0x20
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0x00100000 0x3c
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0x0 0x3c
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0x0 0x4>;
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};
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};
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&usb0 {
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dwc3@a600000 {
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usb-phy = <&usb_emuphy>, <&usb_nop_phy>;
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dr_mode = "peripheral";
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maximum-speed = "high-speed";
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};
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};
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&ufsphy_mem {
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compatible = "qcom,ufs-phy-qrbtc-sdm845";
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/* VDDA_UFS_CORE */
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vdda-phy-supply = <&pm_v6j_l1>;
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vdda-phy-max-microamp = <211000>;
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/* VDDA_UFS_0_1P2 */
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vdda-pll-supply = <&pm_v8g_l3>;
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vdda-pll-max-microamp = <18300>;
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/* Phy GDSC for VDD_MX, always on */
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vdd-phy-gdsc-supply = <&gcc_ufs_mem_phy_gdsc>;
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/* Qref power supply, Refer Qref diagram */
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vdda-qref-supply = <&pm_v8i_l3>;
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vdda-qref-max-microamp = <64500>;
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status = "ok";
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};
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&ufshc_mem {
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limit-tx-hs-gear = <1>;
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limit-rx-hs-gear = <1>;
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limit-rate = <2>; /* HS Rate-B */
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rpm-level = <0>;
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spm-level = <0>;
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vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
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vcc-supply = <&pm_humu_l17>;
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vcc-max-microamp = <1300000>;
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vccq-supply = <&pm_v8d_l1>;
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vccq-max-microamp = <750000>;
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qcom,vddp-ref-clk-supply = <&pm_v8i_l2>;
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qcom,vddp-ref-clk-max-microamp = <100>;
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qcom,vccq-parent-supply = <&pm_v8i_s7>;
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qcom,vccq-parent-max-microamp = <210000>;
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vdda-qref-supply = <&pm_v8i_l3>;
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vdda-qref-max-microamp = <30000>;
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qcom,disable-lpm;
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status = "ok";
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};
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&sdhc_2 {
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status = "ok";
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vdd-supply = <&pm_humu_l9>;
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qcom,vdd-voltage-level = <2950000 2960000>;
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qcom,vdd-current-level = <0 800000>;
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vdd-io-supply = <&pm_humu_l8>;
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qcom,vdd-io-voltage-level = <1800000 2960000>;
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qcom,vdd-io-current-level = <0 5600>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&sdc2_on>;
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pinctrl-1 = <&sdc2_off>;
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cd-gpios = <&tlmm 55 GPIO_ACTIVE_LOW>;
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resets = <&gcc GCC_SDCC2_BCR>;
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reset-names = "core_reset";
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};
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&VDD_MMCX_LEVEL {
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regulator-always-on;
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};
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&VDD_MXC_LEVEL {
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regulator-always-on;
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regulator-min-microvolt = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
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};
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