629a5369ba
git-subtree-dir: qcom/mmrm git-subtree-mainline:1b15f14402git-subtree-split:40cf8f841b
53 lines
2.2 KiB
Plaintext
53 lines
2.2 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
|
|
/*
|
|
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
|
*/
|
|
|
|
&soc {
|
|
mmrm_vm_fe_test: qcom,mmrm-vm-fe-test {
|
|
compatible = "qcom,mmrm-vm-fe-test";
|
|
status = "okay";
|
|
|
|
/* Clock info */
|
|
clock-names =
|
|
"cam_cc_ife_0_clk_src",
|
|
"cam_cc_ife_1_clk_src",
|
|
"cam_cc_ife_2_clk_src",
|
|
"cam_cc_csid_clk_src",
|
|
"cam_cc_sfe_0_clk_src",
|
|
"cam_cc_sfe_1_clk_src",
|
|
"cam_cc_ipe_nps_clk_src",
|
|
"cam_cc_bps_clk_src",
|
|
"cam_cc_ife_lite_clk_src",
|
|
"cam_cc_jpeg_clk_src",
|
|
"cam_cc_camnoc_axi_clk_src",
|
|
"cam_cc_ife_lite_csid_clk_src",
|
|
"cam_cc_icp_clk_src",
|
|
"cam_cc_cphy_rx_clk_src",
|
|
"cam_cc_cci_0_clk_src",
|
|
"cam_cc_cci_1_clk_src",
|
|
"cam_cc_slow_ahb_clk_src",
|
|
"cam_cc_fast_ahb_clk_src";
|
|
|
|
clock_rates =
|
|
<0x1 CAM_CC_IFE_0_CLK_SRC 432000000 594000000 675000000 727000000 727000000>,
|
|
<0x1 CAM_CC_IFE_1_CLK_SRC 432000000 594000000 675000000 727000000 727000000>,
|
|
<0x1 CAM_CC_IFE_2_CLK_SRC 432000000 594000000 675000000 727000000 727000000>,
|
|
<0x1 CAM_CC_CSID_CLK_SRC 400000000 480000000 480000000 480000000 480000000>,
|
|
<0x1 CAM_CC_SFE_0_CLK_SRC 432000000 594000000 675000000 727000000 727000000>,
|
|
<0x1 CAM_CC_SFE_1_CLK_SRC 432000000 594000000 675000000 727000000 727000000>,
|
|
<0x1 CAM_CC_IPE_NPS_CLK_SRC 364000000 500000000 600000000 700000000 700000000>,
|
|
<0x1 CAM_CC_BPS_CLK_SRC 200000000 400000000 480000000 600000000 600000000>,
|
|
<0x1 CAM_CC_IFE_LITE_CLK_SRC 400000000 480000000 480000000 480000000 480000000>,
|
|
<0x1 CAM_CC_JPEG_CLK_SRC 200000000 400000000 480000000 600000000 600000000>,
|
|
<0x1 CAM_CC_CAMNOC_AXI_CLK_SRC 300000000 400000000 400000000 400000000 400000000>,
|
|
<0x1 CAM_CC_IFE_LITE_CSID_CLK_SRC 400000000 480000000 480000000 480000000 480000000>,
|
|
<0x1 CAM_CC_ICP_CLK_SRC 400000000 480000000 600000000 600000000 600000000>,
|
|
<0x1 CAM_CC_CPHY_RX_CLK_SRC 400000000 480000000 480000000 480000000 480000000>,
|
|
<0x1 CAM_CC_CCI_0_CLK_SRC 37500000 37500000 37500000 37500000 37500000>,
|
|
<0x1 CAM_CC_CCI_1_CLK_SRC 37500000 37500000 37500000 37500000 37500000>,
|
|
<0x1 CAM_CC_SLOW_AHB_CLK_SRC 80000000 80000000 80000000 80000000 80000000>,
|
|
<0x1 CAM_CC_FAST_AHB_CLK_SRC 100000000 200000000 300000000 400000000 400000000>;
|
|
};
|
|
};
|