d6c8f03029
Update DT to accomodate new devicetree property 'iommu-addresses' which describes the IOVA addresses that cannot be used. Update qcom,iommu-dma-addr-pool field to iommu-addresses to reflect this. Update PVM DT file to include all the addresses. Update TVM DT file accordingly. Signed-off-by: Anirudh Raghavendra <quic_araghave@quicinc.com> Change-Id: I8fc25330c2db8d468c283c7c64136177031a8d9c
31 lines
915 B
Plaintext
31 lines
915 B
Plaintext
#include <dt-bindings/soc/qcom,ipcc.h>
|
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
|
|
|
&soc {
|
|
fastrpc_gen_pool_region : fastrpc_gen_pool_region {
|
|
iommu-addresses = <&fastrpc_compute_cb1 0x8000 0x11000>;
|
|
};
|
|
|
|
fastrpc_compute_cb1: compute-cb@13 {
|
|
compatible = "qcom,fastrpc-compute-cb";
|
|
reg = <11>;
|
|
iommus = <&apps_smmu 0xC0B 0x0>;
|
|
memory-region = <&fastrpc_gen_pool_region>;
|
|
qcom,iommu-faults = "stall-disable", "HUPCF";
|
|
dma-coherent;
|
|
qrtr-gen-pool = <&fastrpc_compute_cb1>;
|
|
frpc-gen-addr-pool = <0x8000 0x9000>;
|
|
pd-type = <4>; /* SECURE_STATICPD */
|
|
};
|
|
|
|
qrtr-genpool {
|
|
compatible = "qcom,qrtr-genpool";
|
|
gen-pool = <&fastrpc_compute_cb1>;
|
|
interrupt-parent = <&ipcc_mproc_ns1>;
|
|
interrupts = <IPCC_CLIENT_CDSP 0 IRQ_TYPE_EDGE_RISING>,
|
|
<IPCC_CLIENT_CDSP 1 IRQ_TYPE_EDGE_RISING>;
|
|
mboxes = <&ipcc_mproc_ns1 IPCC_CLIENT_CDSP 0>,
|
|
<&ipcc_mproc_ns1 IPCC_CLIENT_CDSP 1>;
|
|
};
|
|
};
|