42da3aebaa
Update tlmm-vm-gpio-list for parrot vm. Change-Id: Id050bfd6b26406a6abff3ebbfa92d5a221e8f15b Signed-off-by: Saranya R <quic_sarar@quicinc.com>
1900 lines
31 KiB
Plaintext
1900 lines
31 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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&soc {
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tlmm: pinctrl@f000000 {
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compatible = "qcom,parrot-tlmm";
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reg = <0xf000000 0x1000000>;
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interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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wakeup-parent = <&pdc>;
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qcom,gpios-reserved = <0 1 2 3 38>;
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bt_en_sleep: bt_en_sleep {
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mux {
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pins = "gpio35";
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function = "gpio";
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};
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config {
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pins = "gpio35";
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drive-strength = <2>;
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output-low;
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bias-pull-down;
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};
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};
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pri_aux_pcm_clk {
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pri_aux_pcm_clk_sleep: pri_aux_pcm_clk_sleep {
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mux {
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pins = "gpio98";
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function = "gpio";
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};
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config {
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pins = "gpio98";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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pri_aux_pcm_clk_active: pri_aux_pcm_clk_active {
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mux {
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pins = "gpio98";
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function = "i2s0_sck";
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};
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config {
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pins = "gpio98";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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output-high;
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};
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};
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};
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pri_aux_pcm_sync {
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pri_aux_pcm_sync_sleep: pri_aux_pcm_sync_sleep {
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mux {
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pins = "gpio99";
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function = "gpio";
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};
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config {
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pins = "gpio99";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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pri_aux_pcm_sync_active: pri_aux_pcm_sync_active {
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mux {
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pins = "gpio99";
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function = "i2s0_ws";
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};
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config {
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pins = "gpio99";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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output-high;
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};
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};
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};
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pri_aux_pcm_din {
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pri_aux_pcm_din_sleep: pri_aux_pcm_din_sleep {
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mux {
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pins = "gpio101";
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function = "gpio";
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};
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config {
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pins = "gpio101";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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pri_aux_pcm_din_active: pri_aux_pcm_din_active {
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mux {
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pins = "gpio101";
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function = "i2s0_data0";
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};
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config {
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pins = "gpio101";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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};
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};
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};
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pri_aux_pcm_dout {
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pri_aux_pcm_dout_sleep: pri_aux_pcm_dout_sleep {
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mux {
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pins = "gpio111";
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function = "gpio";
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};
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config {
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pins = "gpio111";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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pri_aux_pcm_dout_active: pri_aux_pcm_dout_active {
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mux {
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pins = "gpio111";
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function = "i2s0_data1";
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};
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config {
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pins = "gpio111";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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};
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};
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};
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pri_tdm_clk {
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pri_tdm_clk_sleep: pri_tdm_clk_sleep {
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mux {
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pins = "gpio98";
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function = "gpio";
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};
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config {
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pins = "gpio98";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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pri_tdm_clk_active: pri_tdm_clk_active {
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mux {
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pins = "gpio98";
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function = "i2s0_sck";
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};
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config {
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pins = "gpio98";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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output-high;
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};
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};
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};
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pri_tdm_sync {
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pri_tdm_sync_sleep: pri_tdm_sync_sleep {
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mux {
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pins = "gpio99";
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function = "gpio";
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};
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config {
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pins = "gpio99";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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pri_tdm_sync_active: pri_tdm_sync_active {
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mux {
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pins = "gpio99";
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function = "i2s0_ws";
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};
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config {
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pins = "gpio99";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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output-high;
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};
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};
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};
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pri_tdm_din {
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pri_tdm_din_sleep: pri_tdm_din_sleep {
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mux {
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pins = "gpio101";
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function = "gpio";
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};
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config {
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pins = "gpio101";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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pri_tdm_din_active: pri_tdm_din_active {
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mux {
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pins = "gpio101";
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function = "i2s0_data0";
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};
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config {
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pins = "gpio101";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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};
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};
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};
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pri_tdm_dout {
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pri_tdm_dout_sleep: pri_tdm_dout_sleep {
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mux {
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pins = "gpio111";
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function = "gpio";
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};
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config {
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pins = "gpio111";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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pri_tdm_dout_active: pri_tdm_dout_active {
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mux {
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pins = "gpio111";
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function = "i2s0_data1";
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};
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config {
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pins = "gpio111";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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};
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};
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};
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pri_mi2s_sck {
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pri_mi2s_sck_sleep: pri_mi2s_sck_sleep {
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mux {
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pins = "gpio98";
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function = "gpio";
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};
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config {
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pins = "gpio98";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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pri_mi2s_sck_active: pri_mi2s_sck_active {
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mux {
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pins = "gpio98";
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function = "i2s0_sck";
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};
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config {
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pins = "gpio98";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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output-high;
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};
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};
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};
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pri_mi2s_ws {
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pri_mi2s_ws_sleep: pri_mi2s_ws_sleep {
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mux {
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pins = "gpio99";
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function = "gpio";
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};
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config {
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pins = "gpio99";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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pri_mi2s_ws_active: pri_mi2s_ws_active {
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mux {
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pins = "gpio99";
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function = "i2s0_ws";
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};
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config {
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pins = "gpio99";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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output-high;
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};
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};
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};
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pri_mi2s_sd0 {
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pri_mi2s_sd0_sleep: pri_mi2s_sd0_sleep {
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mux {
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pins = "gpio101";
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function = "gpio";
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};
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config {
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pins = "gpio101";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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pri_mi2s_sd0_active: pri_mi2s_sd0_active {
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mux {
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pins = "gpio101";
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function = "i2s0_data0";
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};
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config {
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pins = "gpio101";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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output-high;
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};
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};
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};
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pri_mi2s_sd1 {
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pri_mi2s_sd1_sleep: pri_mi2s_sd1_sleep {
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mux {
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pins = "gpio111";
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function = "gpio";
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};
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config {
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pins = "gpio111";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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pri_mi2s_sd1_active: pri_mi2s_sd1_active {
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mux {
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pins = "gpio111";
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function = "i2s0_data1";
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};
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config {
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pins = "gpio111";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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output-high;
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};
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};
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};
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/* WSA speaker reset pins */
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spkr_1_sd_n {
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spkr_1_sd_n_sleep: spkr_1_sd_n_sleep {
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mux {
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pins = "gpio105";
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function = "gpio";
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};
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config {
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pins = "gpio105";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down;
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input-enable;
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};
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};
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spkr_1_sd_n_active: spkr_1_sd_n_active {
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mux {
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pins = "gpio105";
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function = "gpio";
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};
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config {
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pins = "gpio105";
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drive-strength = <16>; /* 16 mA */
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bias-disable;
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output-high;
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};
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};
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};
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spkr_1_1_sd_n {
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spkr_1_1_sd_n_sleep: spkr_1_1_sd_n_sleep {
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mux {
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pins = "gpio30";
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function = "gpio";
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};
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config {
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pins = "gpio30";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down;
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input-enable;
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};
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};
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spkr_1_1_sd_n_active: spkr_1_1_sd_n_active {
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mux {
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pins = "gpio30";
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function = "gpio";
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};
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config {
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pins = "gpio30";
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drive-strength = <16>; /* 16 mA */
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bias-disable;
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output-high;
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};
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};
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};
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spkr_2_sd_n {
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spkr_2_sd_n_sleep: spkr_2_sd_n_sleep {
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mux {
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pins = "gpio106";
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function = "gpio";
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};
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config {
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pins = "gpio106";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down;
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input-enable;
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};
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};
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spkr_2_sd_n_active: spkr_2_sd_n_active {
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mux {
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pins = "gpio106";
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function = "gpio";
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};
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config {
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pins = "gpio106";
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drive-strength = <16>; /* 16 mA */
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bias-disable;
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output-high;
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};
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};
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};
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/* WCD reset pin */
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wcd_reset_active: wcd_reset_active {
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mux {
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pins = "gpio102";
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function = "gpio";
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};
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config {
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pins = "gpio102";
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drive-strength = <16>;
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output-high;
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};
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};
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wcd_reset_sleep: wcd_reset_sleep {
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mux {
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pins = "gpio102";
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function = "gpio";
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};
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config {
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pins = "gpio102";
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drive-strength = <16>;
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bias-disable;
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output-low;
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};
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};
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qupv3_se3_2uart_pins: qupv3_se3_2uart_pins {
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qupv3_se3_2uart_tx_active: qupv3_se3_2uart_tx_active {
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mux {
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pins = "gpio22";
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function = "qup0_se3_l2";
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};
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config {
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pins = "gpio22";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se3_2uart_rx_active: qupv3_se3_2uart_rx_active {
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mux {
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pins = "gpio23";
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function = "qup0_se3_l3";
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};
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config {
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pins = "gpio23";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se3_2uart_sleep: qupv3_se3_2uart_sleep {
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mux {
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pins = "gpio22", "gpio23";
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function = "gpio";
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};
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config {
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pins = "gpio22", "gpio23";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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};
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qupv3_se11_4uart_pins: qupv3_se11_4uart_pins {
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qupv3_se11_default_cts: qupv3_se11_default_cts {
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mux {
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pins = "gpio14";
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function = "gpio";
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};
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config {
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pins = "gpio14";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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qupv3_se11_default_rts: qupv3_se11_default_rts {
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mux {
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pins = "gpio15";
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function = "gpio";
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};
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config {
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pins = "gpio15";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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qupv3_se11_default_tx: qupv3_se11_default_tx {
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mux {
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pins = "gpio16";
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function = "gpio";
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};
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config {
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pins = "gpio16";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se11_default_rx: qupv3_se11_default_rx {
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mux {
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pins = "gpio17";
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function = "gpio";
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};
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config {
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pins = "gpio17";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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qupv3_se11_cts: qupv3_se11_cts {
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mux {
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pins = "gpio14";
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function = "qup1_se5_l0";
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};
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config {
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pins = "gpio14";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se11_rts: qupv3_se11_rts {
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mux {
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pins = "gpio15";
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function = "qup1_se5_l1";
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};
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config {
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pins = "gpio15";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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qupv3_se11_tx: qupv3_se11_tx {
|
|
mux {
|
|
pins = "gpio16";
|
|
function = "qup1_se5_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio16";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se11_rx: qupv3_se11_rx {
|
|
mux {
|
|
pins = "gpio17";
|
|
function = "qup1_se5_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio17";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se0_i2c_pins: qupv3_se0_i2c_pins {
|
|
qupv3_se0_i2c_sda_active: qupv3_se0_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio28";
|
|
function = "qup0_se0_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio28";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se0_i2c_scl_active: qupv3_se0_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio29";
|
|
function = "qup0_se0_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio29";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se0_i2c_sleep: qupv3_se0_i2c_sleep {
|
|
mux {
|
|
pins = "gpio28", "gpio29";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio28", "gpio29";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se0_spi_pins: qupv3_se0_spi_pins {
|
|
qupv3_se0_spi_miso_active: qupv3_se0_spi_miso_active {
|
|
mux {
|
|
pins = "gpio28";
|
|
function = "qup0_se0_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio28";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se0_spi_mosi_active: qupv3_se0_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio29";
|
|
function = "qup0_se0_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio29";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se0_spi_clk_active: qupv3_se0_spi_clk_active {
|
|
mux {
|
|
pins = "gpio30";
|
|
function = "qup0_se0_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio30";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se0_spi_cs_active: qupv3_se0_spi_cs_active {
|
|
mux {
|
|
pins = "gpio31";
|
|
function = "qup0_se0_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio31";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se0_spi_sleep: qupv3_se0_spi_sleep {
|
|
mux {
|
|
pins = "gpio28", "gpio29",
|
|
"gpio30", "gpio31";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio28", "gpio29",
|
|
"gpio30", "gpio31";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se1_i2c_pins: qupv3_se1_i2c_pins {
|
|
qupv3_se1_i2c_sda_active: qupv3_se1_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio0";
|
|
function = "qup0_se1_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se1_i2c_scl_active: qupv3_se1_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio1";
|
|
function = "qup0_se1_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio1";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se1_i2c_sleep: qupv3_se1_i2c_sleep {
|
|
mux {
|
|
pins = "gpio0", "gpio1";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0", "gpio1";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se1_spi_pins: qupv3_se1_spi_pins {
|
|
qupv3_se1_spi_miso_active: qupv3_se1_spi_miso_active {
|
|
mux {
|
|
pins = "gpio0";
|
|
function = "qup0_se1_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se1_spi_mosi_active: qupv3_se1_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio1";
|
|
function = "qup0_se1_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio1";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se1_spi_clk_active: qupv3_se1_spi_clk_active {
|
|
mux {
|
|
pins = "gpio2";
|
|
function = "qup0_se1_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio2";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se1_spi_cs_active: qupv3_se1_spi_cs_active {
|
|
mux {
|
|
pins = "gpio3";
|
|
function = "qup0_se1_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio3";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se1_spi_sleep: qupv3_se1_spi_sleep {
|
|
mux {
|
|
pins = "gpio0", "gpio1",
|
|
"gpio2", "gpio3";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0", "gpio1",
|
|
"gpio2", "gpio3";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se2_i2c_pins: qupv3_se2_i2c_pins {
|
|
qupv3_se2_i2c_sda_active: qupv3_se2_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio24";
|
|
function = "qup0_se2_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio24";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se2_i2c_scl_active: qupv3_se2_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio25";
|
|
function = "qup0_se2_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio25";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se2_i2c_sleep: qupv3_se2_i2c_sleep {
|
|
mux {
|
|
pins = "gpio24", "gpio25";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio24", "gpio25";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se2_spi_pins: qupv3_se2_spi_pins {
|
|
qupv3_se2_spi_miso_active: qupv3_se2_spi_miso_active {
|
|
mux {
|
|
pins = "gpio24";
|
|
function = "qup0_se2_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio24";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se2_spi_mosi_active: qupv3_se2_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio25";
|
|
function = "qup0_se2_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio25";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se2_spi_clk_active: qupv3_se2_spi_clk_active {
|
|
mux {
|
|
pins = "gpio34";
|
|
function = "qup1_se2_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio34";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se2_spi_cs_active: qupv3_se2_spi_cs_active {
|
|
mux {
|
|
pins = "gpio35";
|
|
function = "qup0_se2_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio35";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se2_spi_sleep: qupv3_se2_spi_sleep {
|
|
mux {
|
|
pins = "gpio24", "gpio25",
|
|
"gpio34", "gpio35";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio24", "gpio25",
|
|
"gpio34", "gpio35";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se4_i2c_pins: qupv3_se4_i2c_pins {
|
|
qupv3_se4_i2c_sda_active: qupv3_se4_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio26";
|
|
function = "qup0_se4_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio26";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_i2c_scl_active: qupv3_se4_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio27";
|
|
function = "qup0_se4_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio27";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_i2c_sleep: qupv3_se4_i2c_sleep {
|
|
mux {
|
|
pins = "gpio26", "gpio27";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio26", "gpio27";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_pins: qupv3_se4_spi_pins {
|
|
qupv3_se4_spi_miso_active: qupv3_se4_spi_miso_active {
|
|
mux {
|
|
pins = "gpio26";
|
|
function = "qup0_se4_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio26";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_mosi_active: qupv3_se4_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio27";
|
|
function = "qup0_se4_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio27";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_clk_active: qupv3_se4_spi_clk_active {
|
|
mux {
|
|
pins = "gpio34";
|
|
function = "qup0_se4_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio34";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_cs_active: qupv3_se4_spi_cs_active {
|
|
mux {
|
|
pins = "gpio35";
|
|
function = "qup0_se4_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio35";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_sleep: qupv3_se4_spi_sleep {
|
|
mux {
|
|
pins = "gpio26", "gpio27",
|
|
"gpio34", "gpio35";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio26", "gpio27",
|
|
"gpio34", "gpio35";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se5_i2c_pins: qupv3_se5_i2c_pins {
|
|
qupv3_se5_i2c_sda_active: qupv3_se5_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio32";
|
|
function = "qup0_se5_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio32";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_i2c_scl_active: qupv3_se5_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio33";
|
|
function = "qup0_se5_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio33";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_i2c_sleep: qupv3_se5_i2c_sleep {
|
|
mux {
|
|
pins = "gpio32", "gpio33";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio32", "gpio33";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_pins: qupv3_se5_spi_pins {
|
|
qupv3_se5_spi_miso_active: qupv3_se5_spi_miso_active {
|
|
mux {
|
|
pins = "gpio32";
|
|
function = "qup0_se5_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio32";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_mosi_active: qupv3_se5_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio33";
|
|
function = "qup0_se5_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio33";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_clk_active: qupv3_se5_spi_clk_active {
|
|
mux {
|
|
pins = "gpio34";
|
|
function = "qup0_se5_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio34";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_cs_active: qupv3_se5_spi_cs_active {
|
|
mux {
|
|
pins = "gpio35";
|
|
function = "qup0_se5_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio35";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_sleep: qupv3_se5_spi_sleep {
|
|
mux {
|
|
pins = "gpio32", "gpio33",
|
|
"gpio34", "gpio35";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio32", "gpio33",
|
|
"gpio34", "gpio35";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se6_i2c_pins: qupv3_se6_i2c_pins {
|
|
qupv3_se6_i2c_sda_active: qupv3_se6_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio4";
|
|
function = "qup1_se0_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio4";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_i2c_scl_active: qupv3_se6_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio5";
|
|
function = "qup1_se0_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio5";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_i2c_sleep: qupv3_se6_i2c_sleep {
|
|
mux {
|
|
pins = "gpio4", "gpio5";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio4", "gpio5";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_pins: qupv3_se6_spi_pins {
|
|
qupv3_se6_spi_miso_active: qupv3_se6_spi_miso_active {
|
|
mux {
|
|
pins = "gpio4";
|
|
function = "qup1_se0_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio4";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_mosi_active: qupv3_se6_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio5";
|
|
function = "qup1_se0_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio5";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_clk_active: qupv3_se6_spi_clk_active {
|
|
mux {
|
|
pins = "gpio6";
|
|
function = "qup1_se0_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio6";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_cs_active: qupv3_se6_spi_cs_active {
|
|
mux {
|
|
pins = "gpio7";
|
|
function = "qup1_se0_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio7";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_sleep: qupv3_se6_spi_sleep {
|
|
mux {
|
|
pins = "gpio4", "gpio5",
|
|
"gpio6", "gpio7";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio4", "gpio5",
|
|
"gpio6", "gpio7";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se7_i2c_pins: qupv3_se7_i2c_pins {
|
|
qupv3_se7_i2c_sda_active: qupv3_se7_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio8";
|
|
function = "qup1_se1_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio8";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_i2c_scl_active: qupv3_se7_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio9";
|
|
function = "qup1_se1_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio9";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_i2c_sleep: qupv3_se7_i2c_sleep {
|
|
mux {
|
|
pins = "gpio8", "gpio9";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio8", "gpio9";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se7_spi_pins: qupv3_se7_spi_pins {
|
|
qupv3_se7_spi_miso_active: qupv3_se7_spi_miso_active {
|
|
mux {
|
|
pins = "gpio8";
|
|
function = "qup1_se1_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio8";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_spi_mosi_active: qupv3_se7_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio9";
|
|
function = "qup1_se1_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio9";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_spi_clk_active: qupv3_se7_spi_clk_active {
|
|
mux {
|
|
pins = "gpio6";
|
|
function = "qup1_se1_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio6";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_spi_cs_active: qupv3_se7_spi_cs_active {
|
|
mux {
|
|
pins = "gpio7";
|
|
function = "qup1_se1_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio7";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_spi_sleep: qupv3_se7_spi_sleep {
|
|
mux {
|
|
pins = "gpio8", "gpio9",
|
|
"gpio6", "gpio7";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio8", "gpio9",
|
|
"gpio6", "gpio7";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se8_i2c_pins: qupv3_se8_i2c_pins {
|
|
qupv3_se8_i2c_sda_active: qupv3_se8_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio18";
|
|
function = "qup1_se2_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio18";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_i2c_scl_active: qupv3_se8_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio19";
|
|
function = "qup1_se2_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio19";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_i2c_sleep: qupv3_se8_i2c_sleep {
|
|
mux {
|
|
pins = "gpio18", "gpio19";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio18", "gpio19";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se8_spi_pins: qupv3_se8_spi_pins {
|
|
qupv3_se8_spi_miso_active: qupv3_se8_spi_miso_active {
|
|
mux {
|
|
pins = "gpio18";
|
|
function = "qup1_se2_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio18";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_spi_mosi_active: qupv3_se8_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio19";
|
|
function = "qup1_se2_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio19";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_spi_clk_active: qupv3_se8_spi_clk_active {
|
|
mux {
|
|
pins = "gpio20";
|
|
function = "qup1_se2_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio20";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_spi_cs_active: qupv3_se8_spi_cs_active {
|
|
mux {
|
|
pins = "gpio21";
|
|
function = "qup1_se2_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio21";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_spi_sleep: qupv3_se8_spi_sleep {
|
|
mux {
|
|
pins = "gpio18", "gpio19",
|
|
"gpio20", "gpio21";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio18", "gpio19",
|
|
"gpio20", "gpio21";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se9_i2c_pins: qupv3_se9_i2c_pins {
|
|
qupv3_se9_i2c_sda_active: qupv3_se9_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio10";
|
|
function = "qup1_se3_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio10";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_i2c_scl_active: qupv3_se9_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio11";
|
|
function = "qup1_se3_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio11";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_i2c_sleep: qupv3_se9_i2c_sleep {
|
|
mux {
|
|
pins = "gpio10", "gpio11";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio10", "gpio11";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se9_spi_pins: qupv3_se9_spi_pins {
|
|
qupv3_se9_spi_miso_active: qupv3_se9_spi_miso_active {
|
|
mux {
|
|
pins = "gpio10";
|
|
function = "qup1_se3_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio10";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_spi_mosi_active: qupv3_se9_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio11";
|
|
function = "qup1_se3_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio11";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_spi_clk_active: qupv3_se9_spi_clk_active {
|
|
mux {
|
|
pins = "gpio12";
|
|
function = "qup1_se3_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_spi_cs_active: qupv3_se9_spi_cs_active {
|
|
mux {
|
|
pins = "gpio13";
|
|
function = "qup1_se3_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio13";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_spi_sleep: qupv3_se9_spi_sleep {
|
|
mux {
|
|
pins = "gpio10", "gpio11",
|
|
"gpio12", "gpio13";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio10", "gpio11",
|
|
"gpio12", "gpio13";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
|
|
/* touchscreen pins */
|
|
pmx_ts_active {
|
|
ts_active: ts_active {
|
|
mux {
|
|
pins = "gpio12", "gpio13";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12", "gpio13";
|
|
drive-strength = <8>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
ts_spi_active: ts_spi_active {
|
|
mux {
|
|
pins = "gpio64", "gpio65";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio64", "gpio65";
|
|
drive-strength = <8>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_reset_suspend {
|
|
ts_reset_suspend: ts_reset_suspend {
|
|
mux {
|
|
pins = "gpio12";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
ts_spi_reset_suspend: ts_spi_reset_suspend {
|
|
mux {
|
|
pins = "gpio64";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio64";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_int_suspend {
|
|
ts_int_suspend: ts_int_suspend {
|
|
mux {
|
|
pins = "gpio13";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio13";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
ts_spi_int_suspend: ts_spi_int_suspend {
|
|
mux {
|
|
pins = "gpio65";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio65";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_release {
|
|
ts_release: ts_release {
|
|
mux {
|
|
pins = "gpio12", "gpio13";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12", "gpio13";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
ts_spi_release: ts_spi_release {
|
|
mux {
|
|
pins = "gpio64", "gpio65";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio64", "gpio65";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
sdc1_on: sdc1_on {
|
|
clk {
|
|
pins = "sdc1_clk";
|
|
bias-disable;
|
|
drive-strength = <16>;
|
|
};
|
|
|
|
cmd {
|
|
pins = "sdc1_cmd";
|
|
bias-pull-up;
|
|
drive-strength = <10>;
|
|
};
|
|
|
|
data {
|
|
pins = "sdc1_data";
|
|
bias-pull-up;
|
|
drive-strength = <10>;
|
|
};
|
|
|
|
rclk {
|
|
pins = "sdc1_rclk";
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
sdc1_off: sdc1_off {
|
|
clk {
|
|
pins = "sdc1_clk";
|
|
bias-disable;
|
|
drive-strength = <2>;
|
|
};
|
|
|
|
cmd {
|
|
pins = "sdc1_cmd";
|
|
bias-pull-up;
|
|
drive-strength = <2>;
|
|
};
|
|
|
|
data {
|
|
pins = "sdc1_data";
|
|
bias-pull-up;
|
|
drive-strength = <2>;
|
|
};
|
|
|
|
rclk {
|
|
pins = "sdc1_rclk";
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
trigout_a: trigout_a {
|
|
mux {
|
|
pins = "gpio26";
|
|
function = "qdss_cti";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio26";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
sdc2_on: sdc2_on {
|
|
clk {
|
|
pins = "sdc2_clk";
|
|
bias-disable;
|
|
drive-strength = <16>;
|
|
};
|
|
|
|
cmd {
|
|
pins = "sdc2_cmd";
|
|
bias-pull-up;
|
|
drive-strength = <10>;
|
|
};
|
|
|
|
data {
|
|
pins = "sdc2_data";
|
|
bias-pull-up;
|
|
drive-strength = <10>;
|
|
};
|
|
|
|
sd-cd {
|
|
pins = "gpio107";
|
|
bias-pull-up;
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
|
|
sdc2_off: sdc2_off {
|
|
clk {
|
|
pins = "sdc2_clk";
|
|
bias-disable;
|
|
drive-strength = <2>;
|
|
};
|
|
|
|
cmd {
|
|
pins = "sdc2_cmd";
|
|
bias-pull-up;
|
|
drive-strength = <2>;
|
|
};
|
|
|
|
data {
|
|
pins = "sdc2_data";
|
|
bias-pull-up;
|
|
drive-strength = <2>;
|
|
};
|
|
|
|
sd-cd {
|
|
pins = "gpio107";
|
|
bias-pull-up;
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
|
|
usb_phy_ps: usb_phy_ps {
|
|
usb3phy_portselect_default: usb3phy_portselect_default {
|
|
mux {
|
|
pins = "gpio100";
|
|
function = "usb0_phy_ps";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio100";
|
|
bias-disable;
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tlmm-vm-mem-access {
|
|
compatible = "qcom,tlmm-vm-mem-access";
|
|
qcom,master;
|
|
tuivm {
|
|
qcom,label = <0x08>;
|
|
qcom,vmid = <45>;
|
|
tlmm-vm-gpio-list = <&tlmm 98 0 &tlmm 99 0>;
|
|
};
|
|
};
|
|
};
|