f2e93ba80b
correct dcc sram size to 0x8000 on sun. Change-Id: I1c4458390101d9d9026977ca71e95fad74667f05 Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
276 lines
4.3 KiB
Plaintext
276 lines
4.3 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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&reserved_memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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dump_mem: mem_dump_region {
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compatible = "shared-dma-pool";
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alloc-ranges = <0x1 0x00000000 0xfffffffe 0xffffffff>;
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reusable;
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alignment = <0x0 0x400000>;
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size = <0x0 0x3000000>;
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};
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};
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&soc {
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dcc: dcc@100ff000 {
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compatible = "qcom,dcc-v2";
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reg = <0x100ff000 0x1000>,
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<0x10080000 0x8000>;
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reg-names = "dcc-base", "dcc-ram-base";
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qcom,transaction_timeout = <0>;
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dcc-ram-offset = <0>;
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};
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mem_dump {
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compatible = "qcom,mem-dump";
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memory-region = <&dump_mem>;
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cpuss_cpu0 {
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qcom,dump-size = <0x40000>;
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qcom,dump-id = <0x280>;
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};
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cpuss_cpu1 {
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qcom,dump-size = <0x40000>;
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qcom,dump-id = <0x281>;
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};
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cpuss_cpu2 {
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qcom,dump-size = <0x40000>;
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qcom,dump-id = <0x282>;
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};
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cpuss_cpu3 {
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qcom,dump-size = <0x40000>;
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qcom,dump-id = <0x283>;
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};
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cpuss_cpu4 {
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qcom,dump-size = <0x40000>;
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qcom,dump-id = <0x284>;
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};
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cpuss_cpu5 {
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qcom,dump-size = <0x40000>;
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qcom,dump-id = <0x285>;
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};
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cpuss_cpu6 {
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qcom,dump-size = <0x40000>;
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qcom,dump-id = <0x286>;
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};
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cpuss_cpu7 {
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qcom,dump-size = <0x40000>;
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qcom,dump-id = <0x287>;
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};
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cpuss_cluster0 {
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qcom,dump-size = <0x40000>;
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qcom,dump-id = <0x270>;
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};
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cpuss_cluster1 {
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qcom,dump-size = <0x40000>;
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qcom,dump-id = <0x271>;
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};
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cpucp {
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qcom,dump-size = <0x80000>;
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qcom,dump-id = <0xf5>;
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};
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scandump_apps {
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qcom,dump-size = <0x380000>;
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qcom,dump-id = <0x130>;
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};
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cache_cpu0 {
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qcom,dump-size = <0x2aa000>;
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qcom,dump-id = <0x230>;
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};
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cache_cpu1 {
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qcom,dump-size = <0x2aa000>;
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qcom,dump-id = <0x231>;
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};
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cache_cpu2 {
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qcom,dump-size = <0x2aa000>;
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qcom,dump-id = <0x232>;
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};
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cache_cpu3 {
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qcom,dump-size = <0x2aa000>;
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qcom,dump-id = <0x233>;
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};
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cache_cpu4 {
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qcom,dump-size = <0x2aa000>;
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qcom,dump-id = <0x234>;
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};
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cache_cpu5 {
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qcom,dump-size = <0x2aa000>;
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qcom,dump-id = <0x235>;
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};
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cache_cpu6 {
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qcom,dump-size = <0x2aa000>;
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qcom,dump-id = <0x236>;
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};
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cache_cpu7 {
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qcom,dump-size = <0x2aa000>;
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qcom,dump-id = <0x237>;
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};
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cpuss_reg {
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qcom,dump-size = <0xa00000>;
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qcom,dump-id = <0xef>;
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};
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spr_cpu0 {
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qcom,dump-size = <0x2000>;
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qcom,dump-id = <0x1f0>;
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};
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spr_cpu1 {
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qcom,dump-size = <0x2000>;
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qcom,dump-id = <0x1f1>;
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};
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spr_cpu2 {
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qcom,dump-size = <0x2000>;
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qcom,dump-id = <0x1f2>;
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};
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spr_cpu3 {
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qcom,dump-size = <0x2000>;
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qcom,dump-id = <0x1f3>;
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};
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spr_cpu4 {
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qcom,dump-size = <0x2000>;
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qcom,dump-id = <0x1f4>;
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};
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spr_cpu5 {
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qcom,dump-size = <0x2000>;
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qcom,dump-id = <0x1f5>;
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};
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spr_cpu6 {
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qcom,dump-size = <0x2000>;
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qcom,dump-id = <0x1f6>;
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};
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spr_cpu7 {
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qcom,dump-size = <0x2000>;
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qcom,dump-id = <0x1f7>;
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};
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rpmh {
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qcom,dump-size = <0x400000>;
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qcom,dump-id = <0xec>;
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};
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rpm_sw {
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qcom,dump-size = <0x28000>;
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qcom,dump-id = <0xea>;
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};
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pmic {
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qcom,dump-size = <0x200000>;
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qcom,dump-id = <0xe4>;
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};
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fcm {
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qcom,dump-size = <0x8400>;
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qcom,dump-id = <0xee>;
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};
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etf_swao {
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qcom,dump-size = <0x10000>;
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qcom,dump-id = <0xf1>;
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};
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etr_reg {
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qcom,dump-size = <0x1000>;
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qcom,dump-id = <0x100>;
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};
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etfswao_reg {
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qcom,dump-size = <0x1000>;
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qcom,dump-id = <0x102>;
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};
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etr1_reg {
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qcom,dump-size = <0x1000>;
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qcom,dump-id = <0x105>;
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};
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misc_data {
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qcom,dump-size = <0x1000>;
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qcom,dump-id = <0xe8>;
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};
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etf_slpi {
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qcom,dump-size = <0x4000>;
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qcom,dump-id = <0xf3>;
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};
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etfslpi_reg {
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qcom,dump-size = <0x1000>;
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qcom,dump-id = <0x103>;
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};
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etf_lpass {
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qcom,dump-size = <0x4000>;
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qcom,dump-id = <0xf4>;
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};
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etflpass_reg {
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qcom,dump-size = <0x1000>;
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qcom,dump-id = <0x104>;
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};
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osm_reg {
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qcom,dump-size = <0x400>;
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qcom,dump-id = <0x163>;
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};
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pcu_reg {
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qcom,dump-size = <0x400>;
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qcom,dump-id = <0x164>;
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};
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fsm_data {
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qcom,dump-size = <0x400>;
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qcom,dump-id = <0x165>;
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};
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scandump_smmu {
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qcom,dump-size = <0x40000>;
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qcom,dump-id = <0x220>;
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};
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scandump_gpu {
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qcom,dump-size = <0x300000>;
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qcom,dump-id = <0x221>;
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};
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scandump_ubwcp {
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qcom,dump-size = <0x40000>;
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qcom,dump-id = <0x222>;
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};
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};
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};
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