3c51dd18f2
git-subtree-dir: qcom/camera git-subtree-mainline:8263fe365egit-subtree-split:a1378b76f0
138 lines
3.3 KiB
Plaintext
138 lines
3.3 KiB
Plaintext
* Qualcomm Technologies, Inc. MSM Camera TPG
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Camera TPG device provides the definitions for enabling
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the TPG hardware. It also provides the functions for the client
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to control the TPG hardware.
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=======================
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Required Node Structure
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=======================
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The TPG device is described in one level of the device node.
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======================================
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First Level Node - CAM TPG device
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======================================
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Required properties:
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- cell-index
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Usage: required
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Value type: <u32>
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Definition: Should specify the hardware index id.
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- compatible
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Usage: required
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Value type: <string>
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Definition: Should specify the compatibility string for matching the
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driver. e.g. "qcom,cam-tpg101", "qcom,cam-tpg102", "qcom,cam-tpgv1", "qcom,cam-tpg103"
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- phy-id
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Usage: required
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Value type: <u32>
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Definition: Should specify the phy index number for csid input configuration
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- reg-names
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Usage: required
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Value type: <string>
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Definition: Should specify the name of the register block.
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- reg
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Usage: required
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Value type: <u32>
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Definition: Register values.
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- reg-cam-base
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Usage: required
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Value type: <u32>
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Definition: List of bases.
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- regulator-names
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Usage: required
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Value type: <string>
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Definition: Name of the regulator resources for TFE HW.
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- xxxx-supply
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Usage: required
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Value type: <phandle>
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Definition: Regulator reference corresponding to the names listed in
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"regulator-names".
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- interrupt-names
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Usage: Required
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Value type: <string>
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Definition: Name of the interrupt.
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- interrupts
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Usage: Required
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Value type: <u32>
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Definition: Interrupt associated with TFE HW.
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- clock-names
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Usage: required
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Value type: <string>
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Definition: List of clock names required for TFE HW.
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- clocks
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Usage: required
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Value type: <phandle>
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Definition: List of clocks used for TFE HW.
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- clock-rates
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Usage: required
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Value type: <u32>
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Definition: List of clocks rates.
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- clock-cntl-level
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Usage: required
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Value type: <string>
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Definition: All different clock level node can support.
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- src-clock-name
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Usage: required
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Value type: <string>
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Definition: Source clock name.
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- clock-control-debugfs
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Usage: optional
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Value type: <string>
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Definition: Enable/Disable clk rate control.
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- scl-clk-names:
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Usage: optional
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Value type: <string>
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Definition: Scalable clock names to identify which clocks needs to update
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along with source clock.
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- shared-clks
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Usage: optional
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Value type: <u32>
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Definition: List of 0 or 1 values indicating whether shared clk or not.
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Example:
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cam_csiphy_tpg0: qcom,tpg0@acf6000 {
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cell-index = <0>;
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compatible = "qcom,tpg103";
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reg-names = "tpg0", "cam_cpas_top";
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reg = <0xacf6000 0x400>,
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<0xac13000 0x1000>;
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reg-cam-base = <0xf6000 0x13000>;
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regulator-names = "camss";
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camss-supply = <&cam_cc_titan_top_gdsc>;
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interrupt-names = "tpg0";
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interrupts = <GIC_SPI 413 IRQ_TYPE_EDGE_RISING>;
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shared-clks = <1 0 0 0>;
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clock-names =
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"cphy_rx_clk_src",
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"csiphy0_clk",
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"csi0phytimer_clk_src",
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"csi0phytimer_clk";
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clocks =
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<&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>,
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<&clock_camcc CAM_CC_CSIPHY0_CLK>,
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<&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>,
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<&clock_camcc CAM_CC_CSI0PHYTIMER_CLK>;
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clock-rates =
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<480000000 0 400000000 0>;
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clock-cntl-level = "nominal";
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src-clock-name = "csi0phytimer_clk_src";
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status = "ok";
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};
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