3bb27e1050
Add dtsi properties for HW Fence Driver to access the phandle of the SOCCP driver, receive IPCC interrupts from SOCCP on the sun target, and map memory for SOCCP access. Change-Id: Iaa5e381fcb38dbb33771e6b15f12d0425e2d1b4b Signed-off-by: Grace An <quic_gracan@quicinc.com>
126 lines
4.6 KiB
Plaintext
126 lines
4.6 KiB
Plaintext
Qualcomm Technologies, Inc. HW FENCE
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HW Fence implements Linux APIs to initialize, deinitialize, register-for-signal, and
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overall manage the hw-fences, for hw-to-hw communcation between hw cores.
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Required properties
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- compatible: Must be "qcom,msm-hw-fence".
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- qcom,ipcc-reg: Registers ranges for ipcc registers.
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- qcom,hw-fence-table-entries: A u32 indicating number of entries for the hw-fence table
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- qcom,hw-fence-queue-entries: A u32 indicating default number of entries for the Queues
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- hw_fence@1: Carved-out memory-mapping region, to be used for mapping of global tables and queues
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used by the hw-fence driver and fence controller running either in secondary vm or
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on SOCCP.
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Required properties on targets without SOCCP:
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- hw_fence@0: Doorbell configuration to communicate with secondary vm through hypervisor.
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Required properties on targets with SOCCP:
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- soccp_controller: Phandle for the soccp controller.
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- interrupts: Interrupt associated with APSS NS0 (to receive interrupts from SOCCP).
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- interrupt-controller: Mark the device node as an interrupt controller.
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- #interrupt-cells: Should be one. The first cell is interrupt number.
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- iommus: Specifies the SID's used by this context bank.
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Optional properties:
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- qcom,hw-fence-ipc-ver: A u32 indicating ipc version. If not provided in device-tree, this is read
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from the registers.
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- qcom,hw-fence-client-type-[name]: A list of four u32 indicating <clients_num, queues_num,
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queue_entries, skip_txq_wr_idx>, where [name] specifies the client
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type these properties apply to. If provided, all four u32 values
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must be provided, and these override default values specified by
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the driver for some clients (e.g. dpu, gpu).
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-- clients_num: number of clients for given client type
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-- queues_num: 1 queue (TxQ) or 2 queues (RxQ and TxQ)
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-- queue_entries: number of entries per client queue
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-- skip_txq_wr_idx: bool indicating whether tx queue wr_idx update
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is skipped within hw fence driver and
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hfi_header->tx_wm is used instead
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- qcom,hw-fence-client-type-[name]-extra: A list of four u32 indicating extra client queue
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properties: <start_padding, end_padding, txq_idx_start,
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txq_idx_by_payload>. Later u32 values do not need to be
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provided to provide values for earlier u32 values.
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-- start_padding: size of padding between queue table header
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and first queue header in bytes
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-- end_padding: size of padding between queue header(s) and
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first queue payload in bytes
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-- txq_idx_start: start_index for TxQ rd_wr_index
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-- txq_idx_by_payload: bool indicating whether TxQ rd_wr_idx
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indexes by payloads instead of default
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dwords
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Example for target with SOCCP:
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msm_hw_fence: qcom,hw-fence {
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compatible = "qcom,msm-hw-fence";
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status = "ok";
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/* SOCCP properties */
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interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-controller;
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#interrupt-cells = <1>;
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iommus = <&apps_smmu 0x562 0x1>;
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soccp_controller = <&soccp_pas>;
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qcom,ipcc-reg = <0x400000 0x100000>;
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qcom,hw-fence-table-entries = <8192>;
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qcom,hw-fence-queue-entries = <800>;
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/* time register */
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qcom,qtime-reg = <0xC221000 0x1000>;
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/* ipc version */
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qcom,hw-fence-ipc-ver = <0x20003>;
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/* base client queue properties */
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qcom,hw-fence-client-type-dpu = <4 2 128 0>;
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qcom,hw-fence-client-type-ife2 = <3 1 64 1>;
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/* extra client queue properties */
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qcom,hw-fence-client-type-ife2-extra = <20 28 1 1>;
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/* haven io-mem specific */
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hw_fence@1 {
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compatible = "qcom,msm-hw-fence-mem";
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qcom,master;
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shared-buffer = <&hwfence_shbuf>;
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};
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};
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Example for target without SOCCP:
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msm_hw_fence: qcom,hw-fence {
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compatible = "qcom,msm-hw-fence";
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status = "ok";
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qcom,ipcc-reg = <0x400000 0x100000>;
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qcom,hw-fence-table-entries = <8192>;
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qcom,hw-fence-queue-entries = <800>;
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/* time register */
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qcom,qtime-reg = <0xC221000 0x1000>;
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/* ipc version */
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qcom,hw-fence-ipc-ver = <0x20003>;
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/* base client queue properties */
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qcom,hw-fence-client-type-dpu = <4 2 128 0>;
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qcom,hw-fence-client-type-ife2 = <3 1 64 1>;
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/* extra client queue properties */
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qcom,hw-fence-client-type-ife2-extra = <20 28 1 1>;
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/* haven doorbell specific */
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hw_fence@0 {
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compatible = "qcom,msm-hw-fence-db";
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qcom,master;
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gunyah-label = <6>;
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peer-name = <3>;
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};
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/* haven io-mem specific */
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hw_fence@1 {
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compatible = "qcom,msm-hw-fence-mem";
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qcom,master;
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gunyah-label = <5>;
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peer-name = <3>;
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shared-buffer = <&hwfence_shbuf>;
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};
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};
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