4930 lines
90 KiB
Plaintext
4930 lines
90 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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&soc {
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ipcb_tgu: tgu@10b0e000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb999>;
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reg = <0x10b0e000 0x1000>;
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reg-names = "tgu-base";
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tgu-steps = <3>;
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tgu-conditions = <4>;
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tgu-regs = <4>;
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tgu-timer-counters = <8>;
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coresight-name = "coresight-tgu-ipcb";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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};
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spmi_tgu0: tgu@10b0f000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb999>;
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reg = <0x10b0f000 0x1000>;
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reg-names = "tgu-base";
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tgu-steps = <3>;
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tgu-conditions = <4>;
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tgu-regs = <9>;
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tgu-timer-counters = <8>;
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coresight-name = "coresight-tgu-spmi0";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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};
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spmi_tgu1: tgu@10b10000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb999>;
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reg = <0x10b10000 0x1000>;
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reg-names = "tgu-base";
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tgu-steps = <3>;
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tgu-conditions = <4>;
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tgu-regs = <9>;
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tgu-timer-counters = <8>;
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coresight-name = "coresight-tgu-spmi1";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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};
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csr: csr@10001000 {
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compatible = "qcom,coresight-csr";
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reg = <0x10001000 0x1000>;
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reg-names = "csr-base";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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coresight-name = "coresight-csr";
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qcom,hwctrl-set-support;
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qcom,set-byte-cntr-support;
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qcom,blk-size = <1>;
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};
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swao_csr: csr@10b11000 {
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compatible = "qcom,coresight-csr";
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reg = <0x10b11000 0x1000>,
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<0x10b110f8 0x78>;
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reg-names = "csr-base", "msr-base";
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coresight-name = "coresight-swao-csr";
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qcom,timestamp-support;
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qcom,msr-support;
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qcom,blk-size = <1>;
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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};
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tpdm_gfx: tpdm@10900000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x10900000 0x1000>;
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reg-names = "tpdm-base";
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coresight-name = "coresight-tpdm-gpu";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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tpdm_gfx_out_funnel_gfx_dl: endpoint {
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remote-endpoint =
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<&funnel_gfx_dl_in_tpdm_gfx>;
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};
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};
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};
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};
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funnel_gfx: funnel@10963000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb908>;
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reg = <0x10963000 0x1000>;
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reg-names = "funnel-base";
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coresight-name = "coresight-funnel-gfx";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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status = "disabled";
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out-ports {
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port {
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funnel_gfx_out_funnel_gfx_dl: endpoint {
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remote-endpoint =
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<&funnel_gfx_dl_in_funnel_gfx>;
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};
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};
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};
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};
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funnel_gfx_dl: funnel@10902000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb908>;
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reg = <0x10902000 0x1000>;
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reg-names = "funnel-base";
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coresight-name = "coresight-funnel-gfx_dl";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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in-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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funnel_gfx_dl_in_tpdm_gfx: endpoint {
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remote-endpoint =
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<&tpdm_gfx_out_funnel_gfx_dl>;
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};
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};
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port@1 {
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reg = <1>;
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funnel_gfx_dl_in_funnel_gfx: endpoint {
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remote-endpoint =
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<&funnel_gfx_out_funnel_gfx_dl>;
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};
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};
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};
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out-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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funnel_gfx_dl_out_tpda_dl3: endpoint {
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remote-endpoint =
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<&tpda_dl3_in_funnel_gfx_dl>;
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source = <&tpdm_gfx>;
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};
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};
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port@1 {
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reg = <1>;
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funnel_gfx_dl_out_funnel_dl3: endpoint {
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remote-endpoint =
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<&funnel_dl3_in_funnel_gfx_dl>;
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};
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};
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};
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};
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tpdm_dl3: tpdm@10c28000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x10C28000 0x1000>;
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reg-names = "tpdm-base";
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coresight-name = "coresight-tpdm-dl3";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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status = "disabled";
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out-ports {
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port {
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tpdm_dl3_out_tpda_dl3: endpoint {
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remote-endpoint =
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<&tpda_dl3_in_tpdm_dl3>;
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};
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};
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};
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};
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tpda_dl3: tpda@10c2c000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb969>;
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reg = <0x10c2c000 0x1000>;
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reg-names = "tpda-base";
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coresight-name = "coresight-tpda-dl3";
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qcom,dsb-elem-size = <0 32>;
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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in-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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tpda_dl3_in_funnel_video: endpoint {
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remote-endpoint =
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<&funnel_video_out_tpda_dl3>;
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};
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};
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port@2 {
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reg = <2>;
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tpda_dl3_in_funnel_eva: endpoint {
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remote-endpoint =
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<&funnel_eva_out_tpda_dl3>;
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};
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};
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port@b {
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reg = <11>;
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tpda_dl3_in_funnel_gfx_dl: endpoint {
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remote-endpoint =
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<&funnel_gfx_dl_out_tpda_dl3>;
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};
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};
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port@1b {
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reg = <27>;
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tpda_dl3_in_tpdm_dl3: endpoint {
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remote-endpoint =
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<&tpdm_dl3_out_tpda_dl3>;
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};
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};
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};
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out-ports {
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port {
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tpda_dl3_out_funnel_dl3: endpoint {
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remote-endpoint =
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<&funnel_dl3_in_tpda_dl3>;
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};
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};
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};
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};
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funnel_dl3: funnel@10c2d000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb908>;
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reg = <0x10c2d000 0x1000>;
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reg-names = "funnel-base";
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coresight-name = "coresight-funnel-dl3";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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in-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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funnel_dl3_in_tpda_dl3: endpoint {
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remote-endpoint =
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<&tpda_dl3_out_funnel_dl3>;
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};
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};
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port@1 {
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reg = <1>;
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funnel_dl3_in_funnel_video: endpoint {
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remote-endpoint =
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<&funnel_video_out_funnel_dl3>;
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};
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};
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port@2 {
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reg = <2>;
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funnel_dl3_in_funnel_eva: endpoint {
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remote-endpoint =
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<&funnel_eva_out_funnel_dl3>;
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};
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};
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port@5 {
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reg = <5>;
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funnel_dl3_in_funnel_gfx_dl: endpoint {
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remote-endpoint =
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<&funnel_gfx_dl_out_funnel_dl3>;
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};
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};
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};
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out-ports {
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port {
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funnel_dl3_out_tn_ag: endpoint {
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remote-endpoint =
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<&tn_ag_in_funnel_dl3>;
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};
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};
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};
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};
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tpdm_video: tpdm@10830000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x10830000 0x1000>;
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reg-names = "tpdm-base";
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coresight-name = "coresight-tpdm-video";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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tpdm_video_out_funnel_video: endpoint {
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remote-endpoint =
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<&funnel_video_in_tpdm_video>;
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};
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};
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};
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};
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funnel_video: funnel@10832000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb908>;
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reg = <0x10832000 0x1000>;
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reg-names = "funnel-base";
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coresight-name = "coresight-funnel-video";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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in-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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funnel_video_in_tpdm_video: endpoint {
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remote-endpoint =
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<&tpdm_video_out_funnel_video>;
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};
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};
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};
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out-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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funnel_video_out_tpda_dl3: endpoint {
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remote-endpoint =
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<&tpda_dl3_in_funnel_video>;
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};
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};
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port@1 {
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reg = <1>;
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funnel_video_out_funnel_dl3: endpoint {
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remote-endpoint =
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<&funnel_dl3_in_funnel_video>;
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};
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};
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};
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};
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tpdm_eva: tpdm@109c0000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x109c0000 0x1000>;
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reg-names = "tpdm-base";
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coresight-name = "coresight-tpdm-eva";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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tpdm_eva_out_funnel_eva: endpoint {
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remote-endpoint =
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<&funnel_eva_in_tpdm_eva>;
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};
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};
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};
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};
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funnel_eva: funnel@109c2000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb908>;
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reg = <0x109c2000 0x1000>;
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reg-names = "funnel-base";
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coresight-name = "coresight-funnel-eva";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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in-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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funnel_eva_in_tpdm_eva: endpoint {
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remote-endpoint =
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<&tpdm_eva_out_funnel_eva>;
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};
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};
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};
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out-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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funnel_eva_out_tpda_dl3: endpoint {
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remote-endpoint =
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<&tpda_dl3_in_funnel_eva>;
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};
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};
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port@1 {
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reg = <1>;
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funnel_eva_out_funnel_dl3: endpoint {
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remote-endpoint =
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<&funnel_dl3_in_funnel_eva>;
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};
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};
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};
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};
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tpdm_mdss: tpdm@10c60000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x10c60000 0x1000>;
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reg-names = "tpdm-base";
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coresight-name = "coresight-tpdm-mdss";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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status = "disabled";
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out-ports {
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port {
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tpdm_mdss_out_funnel_mdss: endpoint {
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remote-endpoint =
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<&funnel_mdss_in_tpdm_mdss>;
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};
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};
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};
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};
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tpdm_mdss_rscc: tpdm@10c61000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x10c61000 0x1000>;
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reg-names = "tpdm-base";
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coresight-name = "coresight-tpdm-mdss-rscc";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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status = "disabled";
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out-ports {
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port {
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tpdm_mdss_rscc_out_funnel_mdss: endpoint {
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remote-endpoint =
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<&funnel_mdss_in_tpdm_mdss_rscc>;
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};
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};
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};
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};
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funnel_mdss: funnel@10c63000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb908>;
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reg = <0x10c63000 0x1000>;
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reg-names = "funnel-base";
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coresight-name = "coresight-funnel-mdss";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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in-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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funnel_mdss_in_tpdm_mdss: endpoint {
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remote-endpoint =
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<&tpdm_mdss_out_funnel_mdss>;
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};
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};
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port@1 {
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reg = <1>;
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funnel_mdss_in_tpdm_mdss_rscc: endpoint {
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remote-endpoint =
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<&tpdm_mdss_rscc_out_funnel_mdss>;
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};
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};
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};
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out-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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funnel_mdss_out_tpda_dl5: endpoint {
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remote-endpoint =
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<&tpda_dl5_in_funnel_mdss>;
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};
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};
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};
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};
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tpda_dl5: tpda@10c08000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb969>;
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reg = <0x10c08000 0x1000>;
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reg-names = "tpda-base";
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coresight-name = "coresight-tpda-dl5";
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qcom,cmb-elem-size = <0 32>,
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<1 32>,
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<2 32>,
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<3 32>;
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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in-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
|
|
tpda_dl5_in_funnel_mdss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_mdss_out_tpda_dl5>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
tpda_dl5_out_funnel_dl5: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_dl5_in_tpda_dl5>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
funnel_dl5: funnel@10c09000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb908>;
|
|
reg = <0x10c09000 0x1000>;
|
|
reg-names = "funnel-base";
|
|
|
|
coresight-name = "coresight-funnel-dl5";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_dl5_in_tpda_dl5: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_dl5_out_funnel_dl5>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_dl5_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_funnel_dl5>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_soccp: tpdm@10ba4000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10ba4000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-soccp";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_soccp_out_tn_soccp: endpoint {
|
|
remote-endpoint =
|
|
<&tn_soccp_in_tpdm_soccp>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tn_soccp: traceNoc@10ba0000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000f0c00>;
|
|
reg = <0x10ba0000 0x1000>;
|
|
reg-names = "traceNoc-base";
|
|
|
|
coresight-name = "coresight-tracenoc-soccp";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
qcom,interconnect-trace-noc;
|
|
|
|
in-ports {
|
|
port {
|
|
tn_soccp_in_tpdm_soccp: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_soccp_out_tn_soccp>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
tn_soccp_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_tn_soccp>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_turing: tpdm@10980000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10980000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-turing";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_turing_out_funnel_turing: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_turing_in_tpdm_turing>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_turing_llm: tpdm@10981000 {
|
|
compatible = "qcom,coresight-static-tpdm";
|
|
coresight-name = "coresight-tpdm-turing-llm";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_turing_llm_out_funnel_turing: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_turing_in_tpdm_turing_llm>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
funnel_turing: funnel@10983000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb908>;
|
|
reg = <0x10983000 0x1000>;
|
|
reg-names = "funnel-base";
|
|
|
|
coresight-name = "coresight-funnel-turing";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_turing_in_tpdm_turing: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_turing_out_funnel_turing>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
funnel_turing_in_tpdm_turing_llm: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_turing_llm_out_funnel_turing>;
|
|
};
|
|
};
|
|
|
|
port@4 {
|
|
reg = <4>;
|
|
funnel_turing_in_funnel_turing_dup: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_turing_dup_out_funnel_turing>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_turing_out_tpda_dl4_16: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_dl4_16_in_funnel_turing>;
|
|
source = <&tpdm_turing>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
funnel_turing_out_tpda_dl4_17: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_dl4_17_in_funnel_turing>;
|
|
source = <&tpdm_turing_llm>;
|
|
};
|
|
};
|
|
|
|
port@2 {
|
|
reg = <2>;
|
|
funnel_turing_out_funnel_dl4: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_dl4_in_funnel_turing>;
|
|
source = <&turing_etm0>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpda_dl4: tpda@10c14000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb969>;
|
|
reg = <0x10c14000 0x1000>;
|
|
reg-names = "tpda-base";
|
|
|
|
coresight-name = "coresight-tpda-dl4";
|
|
|
|
qcom,dsb-elem-size = <16 32>;
|
|
qcom,cmb-elem-size = <17 32>;
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@10 {
|
|
reg = <16>;
|
|
tpda_dl4_16_in_funnel_turing: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_turing_out_tpda_dl4_16>;
|
|
};
|
|
};
|
|
|
|
port@11 {
|
|
reg = <17>;
|
|
tpda_dl4_17_in_funnel_turing: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_turing_out_tpda_dl4_17>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
tpda_dl4_out_funnel_dl4: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_dl4_in_tpda_dl4>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
funnel_dl4: funnel@10c15000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb908>;
|
|
reg = <0x10c15000 0x1000>;
|
|
reg-names = "funnel-base";
|
|
|
|
coresight-name = "coresight-funnel-dl4";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_dl4_in_tpda_dl4: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_dl4_out_funnel_dl4>;
|
|
};
|
|
};
|
|
|
|
port@4 {
|
|
reg = <4>;
|
|
funnel_dl4_in_funnel_turing: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_turing_out_funnel_dl4>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_dl4_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_funnel_dl4>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_modem0: tpdm@10800000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10800000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-modem-0";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_modem0_out_tpda_modem: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_modem_in_tpdm_modem0>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_modem1: tpdm@10801000 {
|
|
compatible = "qcom,coresight-static-tpdm";
|
|
|
|
coresight-name = "coresight-tpdm-modem-1";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_modem1_out_tpda_modem: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_modem_in_tpdm_modem1>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_modem_rscc: tpdm@1080d000 {
|
|
compatible = "qcom,coresight-static-tpdm";
|
|
|
|
coresight-name = "coresight-tpdm-modem-rscc";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_modem_rscc_out_funnel_modem_q6: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_modem_q6_in_tpdm_modem_rscc>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
turing-qmi {
|
|
compatible = "qcom,coresight-qmi";
|
|
|
|
coresight-name = "coresight-qmi-turing";
|
|
qcom,inst-id = <13>;
|
|
|
|
in-ports {
|
|
port {
|
|
qmi_in_turing_etm0: endpoint {
|
|
remote-endpoint =
|
|
<&turing_etm0_out_qmi>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
turing_etm0: turing-etm0 {
|
|
compatible = "qcom,coresight-remote-etm";
|
|
|
|
coresight-name = "coresight-turing-etm0";
|
|
|
|
qcom,atid-num = <2>;
|
|
atid = <38 39>;
|
|
trace-name = "turing-etm0";
|
|
|
|
|
|
out-ports {
|
|
port@0 {
|
|
reg = <0>;
|
|
turing_etm0_out_funnel_turing_dup: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_turing_dup_in_turing_etm0>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
turing_etm0_out_qmi: endpoint {
|
|
remote-endpoint =
|
|
<&qmi_in_turing_etm0>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
wpss_etm: wpss_etm0 {
|
|
compatible = "qcom,coresight-remote-etm";
|
|
|
|
coresight-name = "coresight-wpss-etm0";
|
|
qcom,inst-id = <3>;
|
|
atid = <44>;
|
|
|
|
out-ports {
|
|
port@0 {
|
|
reg = <0>;
|
|
wpss_etm0_out_funnel_wpss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_wpss_in_wpss_etm0>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
wpss_etm0_out_qmi: endpoint {
|
|
remote-endpoint =
|
|
<&qmi_in_wpss_etm0>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
wpss-qmi {
|
|
compatible = "qcom,coresight-qmi";
|
|
|
|
coresight-name = "coresight-qmi-wpss";
|
|
qcom,inst-id = <3>;
|
|
|
|
in-ports {
|
|
port {
|
|
qmi_in_wpss_etm0: endpoint {
|
|
remote-endpoint =
|
|
<&wpss_etm0_out_qmi>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
funnel_turing_dup: funnel@10940000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb908>;
|
|
reg = <0x10940000 0x1000>,
|
|
<0x10983000 0x1000>;
|
|
reg-names = "funnel-base-dummy", "funnel-base-real";
|
|
|
|
coresight-name = "coresight-funnel-turing_dup";
|
|
|
|
qcom,duplicate-funnel;
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
port@5 {
|
|
reg = <5>;
|
|
funnel_turing_dup_in_turing_etm0: endpoint {
|
|
remote-endpoint =
|
|
<&turing_etm0_out_funnel_turing_dup>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
funnel_turing_dup_out_funnel_turing: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_turing_in_funnel_turing_dup>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
modem-etm0 {
|
|
compatible = "qcom,coresight-remote-etm";
|
|
|
|
coresight-name = "coresight-modem-etm0";
|
|
qcom,atid-num = <2>;
|
|
atid = <36 37>;
|
|
trace-name = "modem-etm0";
|
|
qcom,secure-component;
|
|
|
|
out-ports {
|
|
port@0 {
|
|
reg = <0>;
|
|
modem_etm0_out_funnel_modem_q6_dup: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_modem_q6_dup_in_modem_etm0>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
modem_etm0_out_qmi: endpoint {
|
|
remote-endpoint =
|
|
<&qmi_in_modem_etm0>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
modem2-etm0 {
|
|
compatible = "qcom,coresight-remote-etm";
|
|
|
|
coresight-name = "coresight-modem2-etm0";
|
|
qcom,atid-num = <1>;
|
|
atid = <39>;
|
|
trace-name = "modem2-etm0";
|
|
|
|
out-ports {
|
|
port@0 {
|
|
reg = <0>;
|
|
modem2_etm0_out_funnel_modem: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_modem_in_modem2_etm0>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
modem2_etm0_out_qmi: endpoint {
|
|
remote-endpoint =
|
|
<&qmi_in_modem2_etm0>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
modem_diag: modem_diag {
|
|
compatible = "arm,coresight-dummy-source";
|
|
|
|
coresight-name = "coresight-modem-diag";
|
|
atid = <50>;
|
|
|
|
out-ports {
|
|
port {
|
|
modem_diag_out_funnel_modem_q6: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_modem_q6_in_modem_diag>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpda_modem: tpda@10803000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb969>;
|
|
reg = <0x10803000 0x1000>;
|
|
reg-names = "tpda-base";
|
|
|
|
coresight-name = "coresight-tpda-modem";
|
|
|
|
qcom,dsb-elem-size = <0 32>;
|
|
qcom,cmb-elem-size = <0 64>;
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
tpda_modem_in_tpdm_modem0: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_modem0_out_tpda_modem>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
tpda_modem_in_tpdm_modem1: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_modem1_out_tpda_modem>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
tpda_modem_out_funnel_modem_dl: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_modem_dl_in_tpda_modem>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
funnel_modem_q6_dup: funnel@1080d000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb908>;
|
|
reg = <0x1080d000 0x1000>,
|
|
<0x1080c000 0x1000>;
|
|
reg-names = "funnel-base-dummy", "funnel-base-real";
|
|
|
|
coresight-name = "coresight-funnel-modem_q6_dup";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
qcom,duplicate-funnel;
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_modem_q6_dup_in_modem_etm0: endpoint {
|
|
remote-endpoint =
|
|
<&modem_etm0_out_funnel_modem_q6_dup>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
funnel_modem_q6_dup_out_funnel_modem_q6: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_modem_q6_in_funnel_modem_q6_dup>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
funnel_modem_q6: funnel@1080c000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb908>;
|
|
reg = <0x1080c000 0x1000>;
|
|
reg-names = "funnel-base";
|
|
|
|
coresight-name = "coresight-funnel-modem_q6";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
funnel_modem_q6_in_funnel_modem_q6_dup: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_modem_q6_dup_out_funnel_modem_q6>;
|
|
};
|
|
};
|
|
|
|
port@2 {
|
|
reg = <2>;
|
|
funnel_modem_q6_in_modem_diag: endpoint {
|
|
remote-endpoint =
|
|
<&modem_diag_out_funnel_modem_q6>;
|
|
};
|
|
};
|
|
|
|
port@3 {
|
|
funnel_modem_q6_in_tpdm_modem_rscc: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_modem_rscc_out_funnel_modem_q6>;
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
out-ports {
|
|
|
|
port {
|
|
funnel_modem_q6_out_funnel_modem_dl: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_modem_dl_in_funnel_modem_q6>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
funnel_modem_dl: funnel@10804000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb908>;
|
|
reg = <0x10804000 0x1000>;
|
|
reg-names = "funnel-base";
|
|
|
|
coresight-name = "coresight-funnel-modem_dl";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_modem_dl_in_tpda_modem: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_modem_out_funnel_modem_dl>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
funnel_modem_in_modem2_etm0: endpoint {
|
|
remote-endpoint =
|
|
<&modem2_etm0_out_funnel_modem>;
|
|
};
|
|
};
|
|
|
|
port@3 {
|
|
reg = <3>;
|
|
funnel_modem_dl_in_funnel_modem_q6: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_modem_q6_out_funnel_modem_dl>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
|
|
port {
|
|
funnel_modem_dl_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_funnel_modem_dl>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_tmess_prng: tpdm@10cc9000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10cc9000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-tmess-prng";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_tmess_prng_out_tpda_tmess: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_tmess_in_tpdm_tmess_prng>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_tmess0: tpdm@10cc0000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10cc0000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-tmess-0";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
qcom,hw-enable-check;
|
|
status = "disabled";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_tmess0_out_tpda_tmess: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_tmess_in_tpdm_tmess0>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_tmess1: tpdm@10cc1000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10cc1000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-tmess-1";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
qcom,hw-enable-check;
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_tmess1_out_tpda_tmess: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_tmess_in_tpdm_tmess1>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpda_tmess: tpda@10cc4000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb969>;
|
|
reg = <0x10cc4000 0x1000>;
|
|
reg-names = "tpda-base";
|
|
|
|
coresight-name = "coresight-tpda-tmess";
|
|
|
|
qcom,dsb-elem-size = <0 32>;
|
|
qcom,cmb-elem-size = <0 32>,
|
|
<1 32>,
|
|
<2 64>;
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
tpda_tmess_in_tpdm_tmess_prng: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_tmess_prng_out_tpda_tmess>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
tpda_tmess_in_tpdm_tmess0: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_tmess0_out_tpda_tmess>;
|
|
};
|
|
};
|
|
|
|
port@2 {
|
|
reg = <2>;
|
|
tpda_tmess_in_tpdm_tmess1: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_tmess1_out_tpda_tmess>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
tpda_tmess_out_funnel_tmess: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_tmess_in_tpda_tmess>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
funnel_tmess: funnel@10cc5000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb908>;
|
|
reg = <0x10cc5000 0x1000>;
|
|
reg-names = "funnel-base";
|
|
|
|
coresight-name = "coresight-funnel-tmess";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_tmess_in_tpda_tmess: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_tmess_out_funnel_tmess>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_tmess_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_funnel_tmess>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_titan: tpdm@10a04000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10a04000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-titan-dsb";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
static = "disabled";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_titan_dsb_out_tn_titan: endpoint {
|
|
remote-endpoint =
|
|
<&tn_titan_in_tpdm_titan_dsb>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_titan_rscc: tpdm@10a0e000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10a0e000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-titan-rscc";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_titan_rscc_out_tpda_titan: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_titan_in_tpdm_titan_rscc>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpda_titan: tpda@10a0f000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb969>;
|
|
reg = <0x10a0f000 0x1000>;
|
|
reg-names = "tpda-base";
|
|
|
|
coresight-name = "coresight-tpda-titan";
|
|
|
|
qcom,cmb-elem-size = <0 64>;
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
tpda_titan_in_tpdm_titan_rscc: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_titan_rscc_out_tpda_titan>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
tpda_titan_out_tn_titan: endpoint {
|
|
remote-endpoint =
|
|
<&tn_titan_in_tpda_titan>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tn_titan: tn@10a00000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000f0c00>;
|
|
reg = <0x10a00000 0x1000>;
|
|
reg-names = "traceNoc-base";
|
|
|
|
coresight-name = "coresight-tracenoc-titan";
|
|
|
|
status = "disabled";
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
qcom,trace-noc-v2;
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@4 {
|
|
reg = <4>;
|
|
tn_titan_in_tpda_titan: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_titan_out_tn_titan>;
|
|
};
|
|
};
|
|
|
|
port@5 {
|
|
reg = <5>;
|
|
tn_titan_in_tpdm_titan_dsb: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_titan_dsb_out_tn_titan>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
tn_titan_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_tn_titan>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_rscc: tpdm@10c70000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10c70000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-pcie-rscc";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_rscc_out_tpda_rscc: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_rscc_in_tpdm_rscc>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpda_pcie_rscc: tpda@10c71000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb969>;
|
|
reg = <0x10c71000 0x1000>;
|
|
reg-names = "tpda-base";
|
|
|
|
coresight-name = "coresight-tpda-pcie-rscc";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
qcom,cmb-elem-size = <0 8>;
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
tpda_rscc_in_tpdm_rscc: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_rscc_out_tpda_rscc>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
tpda_pcie_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_tpda_pcie>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_llm_silver: tpdm@138a0000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x138a0000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-llm-silver";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_llm_silver_out_tpda_apss: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_apss_in_tpdm_llm_silver>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_llm_gold: tpdm@138b0000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x138b0000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-llm-gold";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_llm_gold_out_tpda_apss: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_apss_in_tpdm_llm_gold>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_llm_ext: tpdm@138c0000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x138c0000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-llm-ext";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_llm_ext_out_tpda_apss: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_apss_in_tpdm_llm_ext>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_llm_apc2: tpdm@13880000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x13880000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-llm-gold-apc";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_llm_apc2_out_tpda_apss: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_apss_in_tpdm_llm_apc2>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_apc2: tpdm@13890000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x13890000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-apc2";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_apc2_out_tpda_apss: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_apss_in_tpdm_apc2>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_int_cmb0:tpdm@13860000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x13860000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-int-cmb0";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_int_cmb0_out_tpda_apss: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_apss_in_tpdm_int_cmb0>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_int_cmb1:tpdm@13861000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x13861000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-int-cmb1";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_int_cmb1_out_tpda_apss: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_apss_in_tpdm_int_cmb1>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_int_dsb: tpdm@13862000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x13862000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-int-dsb";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_int_dsb_out_tpda_apss: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_apss_in_tpdm_int_dsb>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
ete0 {
|
|
compatible = "arm,embedded-trace-extension";
|
|
cpu = <&CPU0>;
|
|
|
|
coresight-name = "coresight-ete0";
|
|
qcom,skip-power-up;
|
|
atid = <1>;
|
|
out-ports {
|
|
port {
|
|
ete0_out_funnel_ete: endpoint {
|
|
remote-endpoint = <&funnel_ete_in_ete0>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
ete1 {
|
|
compatible = "arm,embedded-trace-extension";
|
|
cpu = <&CPU1>;
|
|
|
|
coresight-name = "coresight-ete1";
|
|
qcom,skip-power-up;
|
|
atid = <2>;
|
|
out-ports {
|
|
port {
|
|
ete1_out_funnel_ete: endpoint {
|
|
remote-endpoint = <&funnel_ete_in_ete1>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
ete2 {
|
|
compatible = "arm,embedded-trace-extension";
|
|
cpu = <&CPU2>;
|
|
|
|
coresight-name = "coresight-ete2";
|
|
qcom,skip-power-up;
|
|
atid = <3>;
|
|
out-ports {
|
|
port {
|
|
ete2_out_funnel_ete: endpoint {
|
|
remote-endpoint = <&funnel_ete_in_ete2>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
ete3 {
|
|
compatible = "arm,embedded-trace-extension";
|
|
cpu = <&CPU3>;
|
|
|
|
coresight-name = "coresight-ete3";
|
|
qcom,skip-power-up;
|
|
atid = <4>;
|
|
out-ports {
|
|
port {
|
|
ete3_out_funnel_ete: endpoint {
|
|
remote-endpoint = <&funnel_ete_in_ete3>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
ete4 {
|
|
compatible = "arm,embedded-trace-extension";
|
|
cpu = <&CPU4>;
|
|
|
|
coresight-name = "coresight-ete4";
|
|
qcom,skip-power-up;
|
|
atid = <5>;
|
|
out-ports {
|
|
port {
|
|
ete4_out_funnel_ete: endpoint {
|
|
remote-endpoint = <&funnel_ete_in_ete4>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
ete5 {
|
|
compatible = "arm,embedded-trace-extension";
|
|
cpu = <&CPU5>;
|
|
|
|
coresight-name = "coresight-ete5";
|
|
qcom,skip-power-up;
|
|
atid = <6>;
|
|
out-ports {
|
|
port {
|
|
ete5_out_funnel_ete: endpoint {
|
|
remote-endpoint = <&funnel_ete_in_ete5>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
ete6 {
|
|
compatible = "arm,embedded-trace-extension";
|
|
cpu = <&CPU6>;
|
|
|
|
coresight-name = "coresight-ete6";
|
|
qcom,skip-power-up;
|
|
atid = <7>;
|
|
out-ports {
|
|
port {
|
|
ete6_out_funnel_ete: endpoint {
|
|
remote-endpoint = <&funnel_ete_in_ete6>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
ete7 {
|
|
compatible = "arm,embedded-trace-extension";
|
|
cpu = <&CPU7>;
|
|
|
|
coresight-name = "coresight-ete7";
|
|
qcom,skip-power-up;
|
|
atid = <8>;
|
|
out-ports {
|
|
port {
|
|
ete7_out_funnel_ete: endpoint {
|
|
remote-endpoint = <&funnel_ete_in_ete7>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
funnel_ete {
|
|
compatible = "arm,coresight-static-funnel";
|
|
coresight-name = "coresight-funnel-ete";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_ete_in_ete0: endpoint {
|
|
remote-endpoint =
|
|
<&ete0_out_funnel_ete>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
funnel_ete_in_ete1: endpoint {
|
|
remote-endpoint =
|
|
<&ete1_out_funnel_ete>;
|
|
};
|
|
};
|
|
|
|
port@2 {
|
|
reg = <2>;
|
|
funnel_ete_in_ete2: endpoint {
|
|
remote-endpoint =
|
|
<&ete2_out_funnel_ete>;
|
|
};
|
|
};
|
|
|
|
port@3 {
|
|
reg = <3>;
|
|
funnel_ete_in_ete3: endpoint {
|
|
remote-endpoint =
|
|
<&ete3_out_funnel_ete>;
|
|
};
|
|
};
|
|
|
|
port@4 {
|
|
reg = <4>;
|
|
funnel_ete_in_ete4: endpoint {
|
|
remote-endpoint =
|
|
<&ete4_out_funnel_ete>;
|
|
};
|
|
};
|
|
|
|
port@5 {
|
|
reg = <5>;
|
|
funnel_ete_in_ete5: endpoint {
|
|
remote-endpoint =
|
|
<&ete5_out_funnel_ete>;
|
|
};
|
|
};
|
|
|
|
port@6 {
|
|
reg = <6>;
|
|
funnel_ete_in_ete6: endpoint {
|
|
remote-endpoint =
|
|
<&ete6_out_funnel_ete>;
|
|
};
|
|
};
|
|
|
|
port@7 {
|
|
reg = <7>;
|
|
funnel_ete_in_ete7: endpoint {
|
|
remote-endpoint =
|
|
<&ete7_out_funnel_ete>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
funnel_ete_out_funnel_apss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_apss_in_funnel_ete>;
|
|
};
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
tpda_apss: tpda@13864000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb969>;
|
|
reg = <0x13864000 0x1000>;
|
|
reg-names = "tpda-base";
|
|
|
|
coresight-name = "coresight-tpda-apss";
|
|
|
|
qcom,dsb-elem-size = <2 32>,
|
|
<5 32>,
|
|
<8 32>;
|
|
|
|
qcom,cmb-elem-size = <0 32>,
|
|
<1 32>,
|
|
<3 32>,
|
|
<6 64>,
|
|
<7 64>;
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
tpda_apss_in_tpdm_llm_silver: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_llm_silver_out_tpda_apss>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
tpda_apss_in_tpdm_llm_gold: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_llm_gold_out_tpda_apss>;
|
|
};
|
|
};
|
|
|
|
port@2 {
|
|
reg = <2>;
|
|
tpda_apss_in_tpdm_llm_ext: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_llm_ext_out_tpda_apss>;
|
|
};
|
|
};
|
|
|
|
port@3 {
|
|
reg = <3>;
|
|
tpda_apss_in_tpdm_llm_apc2: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_llm_apc2_out_tpda_apss>;
|
|
};
|
|
};
|
|
|
|
port@5 {
|
|
reg = <5>;
|
|
tpda_apss_in_tpdm_apc2: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_apc2_out_tpda_apss>;
|
|
};
|
|
};
|
|
|
|
port@6 {
|
|
reg = <6>;
|
|
tpda_apss_in_tpdm_int_cmb0: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_int_cmb0_out_tpda_apss>;
|
|
};
|
|
};
|
|
|
|
port@7 {
|
|
reg = <7>;
|
|
tpda_apss_in_tpdm_int_cmb1: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_int_cmb1_out_tpda_apss>;
|
|
};
|
|
};
|
|
|
|
port@8 {
|
|
reg = <8>;
|
|
tpda_apss_in_tpdm_int_dsb: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_int_dsb_out_tpda_apss>;
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
tpda_apss_out_funnel_apss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_apss_in_tpda_apss>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
funnel_apss: funnel@13810000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb908>;
|
|
reg = <0x13810000 0x1000>;
|
|
reg-names = "funnel-base";
|
|
|
|
coresight-name = "coresight-funnel-apss";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_apss_in_funnel_ete: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_ete_out_funnel_apss>;
|
|
};
|
|
};
|
|
|
|
port@3 {
|
|
reg = <3>;
|
|
funnel_apss_in_tpda_apss: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_apss_out_funnel_apss>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
funnel_apss_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_funnel_apss>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_ddr_lpi: tpdm@10b34000 {
|
|
compatible = "arm,coresight-dummy-source";
|
|
coresight-name = "coresight-tpdm-ddr-lpi";
|
|
trace-name = "tracenoc-ddr-lpi";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_ddr_lpi_out_funnel_aoss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_aoss_in_tpdm_ddr_lpi>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_ddr_llcc0: tpdm@10f82000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10f82000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-ddr-llcc0";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_ddr_llcc0_out_tn_ddr: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ddr_in_tpdm_ddr_llcc0>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_ddr_llcc1: tpdm@10f84000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10f84000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-ddr-llcc1";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_ddr_llcc1_out_tn_ddr: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ddr_in_tpdm_ddr_llcc1>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_ddr_llcc2: tpdm@10f83000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10f83000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-ddr-llcc2";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_ddr_llcc2_out_tn_ddr: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ddr_in_tpdm_ddr_llcc2>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_ddr_llcc3: tpdm@10f85000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10f85000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-ddr-llcc3";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_ddr_llcc3_out_tn_ddr: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ddr_in_tpdm_ddr_llcc3>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_ddr_dpm: tpdm@10d04000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10d04000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-ddr-dpm";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_ddr_dpm_out_tn_ddr: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ddr_in_tpdm_ddr_dpm>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_ddr_shrm: tpdm@10d03000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10d03000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-ddr-shrm";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_ddr_shrm_out_tn_ddr: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ddr_in_tpdm_ddr_shrm>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_ddr_ch02: tpdm@10d06000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10d06000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-ddr-ch02";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_ddr_ch02_out_tn_ddr: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ddr_in_tpdm_ddr_ch02>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_ddr_ch13: tpdm@10d08000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10d08000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-ddr-ch13";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_ddr_ch13_out_tn_ddr: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ddr_in_tpdm_ddr_ch13>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
gladiator {
|
|
compatible = "arm,coresight-dummy-source";
|
|
coresight-name = "coresight-gladiator";
|
|
atid = <96>;
|
|
|
|
out-ports {
|
|
port {
|
|
gladiator_out_tn_ddr: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ddr_in_gladiator>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
ddr_tn: TN@10d00000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000f0c00>;
|
|
reg = <0x10d00000 0x1000>;
|
|
reg-names = "traceNoc-base";
|
|
|
|
coresight-name = "coresight-tracenoc-ddr";
|
|
qcom,interconnect-trace-noc;
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@6 {
|
|
reg = <6>;
|
|
tn_ddr_in_gladiator: endpoint {
|
|
remote-endpoint =
|
|
<&gladiator_out_tn_ddr>;
|
|
};
|
|
};
|
|
|
|
port@9 {
|
|
reg = <9>;
|
|
tn_ddr_in_tpdm_ddr_llcc0: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_ddr_llcc0_out_tn_ddr>;
|
|
};
|
|
};
|
|
|
|
port@a {
|
|
reg = <10>;
|
|
tn_ddr_in_tpdm_ddr_llcc1: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_ddr_llcc1_out_tn_ddr>;
|
|
};
|
|
};
|
|
|
|
port@b {
|
|
reg = <11>;
|
|
tn_ddr_in_tpdm_ddr_llcc2: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_ddr_llcc2_out_tn_ddr>;
|
|
};
|
|
};
|
|
|
|
port@c {
|
|
reg = <12>;
|
|
tn_ddr_in_tpdm_ddr_llcc3: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_ddr_llcc3_out_tn_ddr>;
|
|
};
|
|
};
|
|
|
|
port@d {
|
|
reg = <13>;
|
|
tn_ddr_in_tpdm_ddr_shrm: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_ddr_shrm_out_tn_ddr>;
|
|
};
|
|
};
|
|
|
|
port@e {
|
|
reg = <14>;
|
|
tn_ddr_in_tpdm_ddr_dpm: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_ddr_dpm_out_tn_ddr>;
|
|
};
|
|
};
|
|
|
|
port@f {
|
|
reg = <15>;
|
|
tn_ddr_in_tpdm_ddr_ch02: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_ddr_ch02_out_tn_ddr>;
|
|
};
|
|
};
|
|
|
|
port@10 {
|
|
reg = <16>;
|
|
tn_ddr_in_tpdm_ddr_ch13: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_ddr_ch13_out_tn_ddr>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
tn_ddr_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_tn_ddr>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
audio_etm0 {
|
|
compatible = "qcom,coresight-remote-etm";
|
|
|
|
coresight-name = "coresight-audio-etm0";
|
|
qcom,atid-num = <2>;
|
|
trace-name = "audio-etm0";
|
|
atid = <40 41>;
|
|
|
|
out-ports {
|
|
port@0 {
|
|
reg = <0>;
|
|
audio_etm0_out_funnel_lpass_lpi_0: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_lpass_lpi_0_in_audio_etm0>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
audio_etm0_out_qmi: endpoint {
|
|
remote-endpoint =
|
|
<&qmi_in_audio_etm0>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_lpass_lpi: tpdm@10b46000 {
|
|
compatible = "arm,coresight-dummy-source";
|
|
coresight-name = "coresight-tpdm-lpass-lpi";
|
|
|
|
trace-name = "tpda-lpass-lpi";
|
|
|
|
out-ports {
|
|
port@0 {
|
|
reg = <0>;
|
|
tpdm_lpass_lpi_out_funnel_lpass_lpi_1: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_lpass_lpi_1_in_tpdm_lpass_lpi>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
lpass_lpi_out_qmi: endpoint {
|
|
remote-endpoint =
|
|
<&qmi_in_lpass_lpi>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_lpass_rscc: tpdm@10b52000 {
|
|
compatible = "arm,coresight-dummy-source";
|
|
coresight-name = "coresight-tpdm-lpass-rscc";
|
|
|
|
trace-name = "tpda-lpass-rscc";
|
|
|
|
out-ports {
|
|
port@0 {
|
|
reg = <0>;
|
|
tpdm_lpass_rscc_out_funnel_lpass_lpi_1: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_lpass_lpi_1_in_tpdm_lpass_rscc>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
lpass_rscc_out_qmi: endpoint {
|
|
remote-endpoint =
|
|
<&qmi_in_lpass_rscc>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_lpass_audio: tpdm@10b54000 {
|
|
compatible = "arm,coresight-dummy-source";
|
|
coresight-name = "coresight-tpdm-lpass-audio";
|
|
|
|
trace-name = "tpda-lpass-audio";
|
|
status = "disabled";
|
|
|
|
out-ports {
|
|
port@0 {
|
|
reg = <0>;
|
|
tpdm_lpass_audio_out_funnel_lpass_lpi_1: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_lpass_lpi_1_in_tpdm_lpass_audio>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
lpass_audio_out_qmi: endpoint {
|
|
remote-endpoint =
|
|
<&qmi_in_lpass_audio>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_lpass_crdl: tpdm@10b84000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10b84000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-lpass-crdl";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_lpass_crdl_out_tn_lpass: endpoint {
|
|
remote-endpoint =
|
|
<&tn_lpass_in_tpdm_lpass_crdl>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tn_lpass: TN@10b80000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000f0c00>;
|
|
reg = <0x10b80000 0x3400>;
|
|
reg-names = "traceNoc-base";
|
|
|
|
coresight-name = "coresight-tracenoc-lpass";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
qcom,interconnect-trace-noc;
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
tn_lpass_in_tpdm_lpass_crdl: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_lpass_crdl_out_tn_lpass>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
tn_lpass_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_tn_lpass>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
lpass_stm: lpass-stm {
|
|
compatible = "arm,coresight-dummy-source";
|
|
coresight-name = "coresight-lpass-stm";
|
|
trace-name = "lpass-stm";
|
|
atid = <25>;
|
|
|
|
out-ports {
|
|
port@0 {
|
|
reg = <0>;
|
|
lpass_stm_out_funnel_lpass_lpi_1: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_lpass_lpi_1_in_lpass_stm>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
lpass_stm_out_qmi: endpoint {
|
|
remote-endpoint =
|
|
<&qmi_in_lpass_stm>;
|
|
};
|
|
};
|
|
|
|
};
|
|
};
|
|
|
|
funnel_lpass_lpi_1: funnel@10b50000 {
|
|
compatible = "arm,coresight-static-funnel";
|
|
coresight-name = "coresight-funnel-lpass_lpi_1";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_lpass_lpi_1_in_lpass_stm: endpoint {
|
|
remote-endpoint =
|
|
<&lpass_stm_out_funnel_lpass_lpi_1>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
funnel_lpass_lpi_1_in_tpdm_lpass_lpi: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_lpass_lpi_out_funnel_lpass_lpi_1>;
|
|
};
|
|
};
|
|
|
|
port@4 {
|
|
reg = <4>;
|
|
funnel_lpass_lpi_1_in_tpdm_lpass_rscc: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_lpass_rscc_out_funnel_lpass_lpi_1>;
|
|
};
|
|
};
|
|
|
|
port@5 {
|
|
reg = <5>;
|
|
funnel_lpass_lpi_1_in_tpdm_lpass_audio: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_lpass_audio_out_funnel_lpass_lpi_1>;
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
funnel_lpass_lpi_1_out_funnel_lpass_lpi_0: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_lpass_lpi_0_in_funnel_lpass_lpi_1>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
funnel_lpass_lpi_0: funnel@10b44000 {
|
|
compatible = "arm,coresight-static-funnel";
|
|
coresight-name = "coresight-funnel-lpass_lpi_0";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_lpass_lpi_0_in_audio_etm0: endpoint {
|
|
remote-endpoint =
|
|
<&audio_etm0_out_funnel_lpass_lpi_0>;
|
|
};
|
|
};
|
|
|
|
port@7 {
|
|
reg = <7>;
|
|
funnel_lpass_lpi_0_in_funnel_lpass_lpi_1: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_lpass_lpi_1_out_funnel_lpass_lpi_0>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
funnel_lpass_lpi_0_out_funnel_aoss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_aoss_in_funnel_lpass_lpi_0>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
stm: stm@10002000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb962>;
|
|
reg = <0x10002000 0x1000>,
|
|
<0x37280000 0x180000>;
|
|
reg-names = "stm-base", "stm-stimulus-base";
|
|
|
|
coresight-name = "coresight-stm";
|
|
atid = <16>;
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
stm_out_funnel_in0: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_in0_in_stm>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_dcc: tpdm@10003000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10003000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-dcc";
|
|
|
|
qcom,hw-enable-check;
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_dcc_out_tpda_qdss: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_qdss_in_tpdm_dcc>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_ufs: tpdm@10c23000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10c23000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-ufs";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_ufs_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_tpdm_ufs>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_sdcc5_2: tpdm@10c20000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10c20000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-sdcc2";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_sdcc5_2_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_tpdm_sdcc5_2>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_ipa: tpdm@10c22000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10c22000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-ipa";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_ipa_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_tpdm_ipa>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_vsense: tpdm@10840000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10840000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-vsense";
|
|
status = "disabled";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_vsense_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_tpdm_vsense>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_qm: tpdm@109d0000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x109d0000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-qm";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_qm_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_tpdm_qm>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_prng: tpdm@10841000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10841000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-prng";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_prng_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_tpdm_prng>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_gcc: tpdm@1082c000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x1082c000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-gcc";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_gcc_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_tpdm_gcc>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_dl_mm: tpdm@109a4000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x109a4000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-dlmm";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_dl_mm_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_tpdm_dl_mm>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_north: tpdm@109a6000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x109a6000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-north-dsb";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_north_dsb_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_tpdm_north_dsb>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_south: tpdm@109a5000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x109a5000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-south-dsb";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_south_dsb_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_tpdm_south_dsb>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_ipcc_cmb: tpdm@109ab000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x109ab000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-ipcc";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_ipcc_cmb_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_tpdm_ipcc_cmb>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_pmu: tpdm@109aa000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x109aa000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-pmu";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_pmu_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_tpdm_pmu>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_rdpm_cmb0: tpdm@109a7000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x109a7000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-rdpm-cmb0";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_rdpm_cmb0_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_tpdm_rdpm_cmb0>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_rdpm_cmb1: tpdm@109a9000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x109a9000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-rdpm-cmb1";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_rdpm_cmb1_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_tpdm_rdpm_cmb1>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_rdpm_cmb2: tpdm@109a8000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x109a8000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-rdpm-cmb2";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_rdpm_cmb2_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_tpdm_rdpm_cmb2>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_dch: tpdm@109ad000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x109ad000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-dch";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_dch_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_tpdm_dch>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_channel: tpdm@109ae000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x109ae000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-channel";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_channel_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_tpdm_channel>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tn_ag: tn@109a0000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000f0c00>;
|
|
reg = <0x109a0000 0x3080>;
|
|
reg-names = "traceNoc-base";
|
|
|
|
coresight-name = "coresight-tracenoc-ag";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
qcom,trace-noc-v2;
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@8 {
|
|
reg = <8>;
|
|
tn_ag_in_tpda_pcie: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_pcie_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@b {
|
|
reg = <11>;
|
|
tn_ag_in_tn_titan: endpoint {
|
|
remote-endpoint =
|
|
<&tn_titan_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@c {
|
|
reg = <12>;
|
|
tn_ag_in_funnel_tmess: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_tmess_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@d {
|
|
reg = <13>;
|
|
tn_ag_in_funnel_modem_dl: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_modem_dl_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@11 {
|
|
reg = <17>;
|
|
tn_ag_in_tpdm_gcc: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_gcc_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@12 {
|
|
reg = <18>;
|
|
tn_ag_in_tpdm_prng: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_prng_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@13 {
|
|
reg = <19>;
|
|
tn_ag_in_tpdm_qm: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_prng_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@14 {
|
|
reg = <20>;
|
|
tn_ag_in_tpdm_vsense: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_vsense_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@15 {
|
|
reg = <21>;
|
|
tn_ag_in_tpdm_ipa: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_ipa_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@16 {
|
|
reg = <22>;
|
|
tn_ag_in_tpdm_sdcc5_2: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_sdcc5_2_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@18 {
|
|
reg = <24>;
|
|
tn_ag_in_tpdm_ufs: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_ufs_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@19 {
|
|
reg = <25>;
|
|
tn_ag_in_tpdm_dl_mm: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_dl_mm_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@1a {
|
|
reg = <26>;
|
|
tn_ag_in_tpdm_north_dsb: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_north_dsb_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@1b {
|
|
reg = <27>;
|
|
tn_ag_in_tpdm_south_dsb: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_south_dsb_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@1c {
|
|
reg = <28>;
|
|
tn_ag_in_tpdm_ipcc_cmb: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_ipcc_cmb_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@1d {
|
|
reg = <29>;
|
|
tn_ag_in_tpdm_pmu: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_pmu_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@1e {
|
|
reg = <30>;
|
|
tn_ag_in_tpdm_rdpm_cmb0: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_rdpm_cmb0_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@1f {
|
|
reg = <31>;
|
|
tn_ag_in_tpdm_rdpm_cmb1: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_rdpm_cmb1_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@20 {
|
|
reg = <32>;
|
|
tn_ag_in_tpdm_rdpm_cmb2: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_rdpm_cmb2_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@21 {
|
|
reg = <33>;
|
|
tn_ag_in_funnel_apss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_apss_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@23 {
|
|
reg = <35>;
|
|
tn_ag_in_tpdm_dch: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_dch_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@24 {
|
|
reg = <36>;
|
|
tn_ag_in_tpdm_channel: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_channel_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@26 {
|
|
reg = <38>;
|
|
tn_ag_in_funnel_dl5: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_dl5_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@2c {
|
|
reg = <44>;
|
|
tn_ag_in_funnel_dl2: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_dl2_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@2d {
|
|
reg = <45>;
|
|
tn_ag_in_funnel_dl3: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_dl3_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@2e {
|
|
reg = <46>;
|
|
tn_ag_in_funnel_dl4: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_dl4_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@4a {
|
|
reg = <74>;
|
|
tn_ag_in_tn_ddr: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ddr_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@5f {
|
|
reg = <95>;
|
|
tn_ag_in_tn_lpass: endpoint {
|
|
remote-endpoint =
|
|
<&tn_lpass_out_tn_ag>;
|
|
};
|
|
};
|
|
|
|
port@61 {
|
|
reg = <97>;
|
|
tn_ag_in_tn_soccp: endpoint {
|
|
remote-endpoint =
|
|
<&tn_soccp_out_tn_ag>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
tn_ag_out_funnel_in0: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_in0_in_tn_ag>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_spdm: tpdm@1000f000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x1000f000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-spdm";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_spdm_out_tpda_qdss: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_qdss_in_tpdm_spdm>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpda_qdss: tpda@10004000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb969>;
|
|
reg = <0x10004000 0x1000>;
|
|
reg-names = "tpda-base";
|
|
|
|
coresight-name = "coresight-tpda-qdss";
|
|
|
|
qcom,cmb-elem-size = <0 32>,
|
|
<1 32>;
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
tpda_qdss_in_tpdm_dcc: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_dcc_out_tpda_qdss>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
tpda_qdss_in_tpdm_spdm: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_spdm_out_tpda_qdss>;
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
tpda_qdss_out_funnel_in0: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_in0_in_tpda_qdss>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
funnel_in0: funnel@10041000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb908>;
|
|
reg = <0x10041000 0x1000>;
|
|
reg-names = "funnel-base";
|
|
|
|
coresight-name = "coresight-funnel-in0";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_in0_in_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_out_funnel_in0>;
|
|
};
|
|
};
|
|
|
|
port@6 {
|
|
reg = <6>;
|
|
funnel_in0_in_tpda_qdss: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_qdss_out_funnel_in0>;
|
|
};
|
|
};
|
|
|
|
port@7 {
|
|
reg = <7>;
|
|
funnel_in0_in_stm: endpoint {
|
|
remote-endpoint =
|
|
<&stm_out_funnel_in0>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
funnel_in0_out_funnel_aoss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_aoss_in_funnel_in0>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_swao_prio0: tpdm@10b09000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10b09000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-swao-prio-0";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_swao_prio0_out_tpda_aoss: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_aoss_in_tpdm_swao_prio0>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_swao_prio1: tpdm@10b0a000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10b0a000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-swao-prio-1";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_swao_prio1_out_tpda_aoss: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_aoss_in_tpdm_swao_prio1>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_swao_prio2: tpdm@10b0b000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10b0b000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-swao-prio-2";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_swao_prio2_out_tpda_aoss: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_aoss_in_tpdm_swao_prio2>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_swao_prio3: tpdm@10b0c000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10b0c000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-swao-prio-3";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_swao_prio3_out_tpda_aoss: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_aoss_in_tpdm_swao_prio3>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_swao: tpdm@10b0d000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10b0d000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-swao-1";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_swao_out_tpda_aoss: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_aoss_in_tpdm_swao>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpda_aoss: tpda@10b08000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb969>;
|
|
reg = <0x10b08000 0x1000>;
|
|
reg-names = "tpda-base";
|
|
|
|
coresight-name = "coresight-tpda-aoss";
|
|
|
|
qcom,cmb-elem-size = <0 64>,
|
|
<1 64>,
|
|
<2 64>,
|
|
<3 64>;
|
|
|
|
qcom,dsb-elem-size = <4 32>;
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
tpda_aoss_in_tpdm_swao_prio0: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_swao_prio0_out_tpda_aoss>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
tpda_aoss_in_tpdm_swao_prio1: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_swao_prio1_out_tpda_aoss>;
|
|
};
|
|
};
|
|
|
|
port@2 {
|
|
reg = <2>;
|
|
tpda_aoss_in_tpdm_swao_prio2: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_swao_prio2_out_tpda_aoss>;
|
|
};
|
|
};
|
|
|
|
port@3 {
|
|
reg = <3>;
|
|
tpda_aoss_in_tpdm_swao_prio3: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_swao_prio3_out_tpda_aoss>;
|
|
};
|
|
};
|
|
|
|
port@4 {
|
|
reg = <4>;
|
|
tpda_aoss_in_tpdm_swao: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_swao_out_tpda_aoss>;
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
tpda_aoss_out_funnel_aoss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_aoss_in_tpda_aoss>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
funnel_aoss: funnel@10b04000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb908>;
|
|
reg = <0x10b04000 0x1000>;
|
|
reg-names = "funnel-base";
|
|
|
|
coresight-name = "coresight-funnel-aoss";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@3 {
|
|
reg = <3>;
|
|
funnel_aoss_in_tpdm_ddr_lpi: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_ddr_lpi_out_funnel_aoss>;
|
|
};
|
|
};
|
|
|
|
port@5 {
|
|
reg = <5>;
|
|
funnel_aoss_in_funnel_lpass_lpi_0: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_lpass_lpi_0_out_funnel_aoss>;
|
|
};
|
|
};
|
|
|
|
port@6 {
|
|
reg = <6>;
|
|
funnel_aoss_in_tpda_aoss: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_aoss_out_funnel_aoss>;
|
|
};
|
|
};
|
|
|
|
port@7 {
|
|
reg = <7>;
|
|
funnel_aoss_in_funnel_in0: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_in0_out_funnel_aoss>;
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
funnel_aoss_out_tmc_etf: endpoint {
|
|
remote-endpoint =
|
|
<&tmc_etf_in_funnel_aoss>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tmc_etf: tmc@10b05000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb961>;
|
|
reg = <0x10b05000 0x1000>;
|
|
reg-names = "tmc-base";
|
|
|
|
coresight-name = "coresight-tmc-etf";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
port {
|
|
tmc_etf_in_funnel_aoss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_aoss_out_tmc_etf>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
tmc_etf_out_replicator_swao: endpoint {
|
|
remote-endpoint =
|
|
<&replicator_swao_in_tmc_etf>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
replicator_swao: replicator@10b06000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb909>;
|
|
reg = <0x10b06000 0x1000>;
|
|
reg-names = "replicator-base";
|
|
|
|
coresight-name = "coresight-replicator_swao";
|
|
|
|
qcom,replicator-loses-context;
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
port {
|
|
replicator_swao_in_tmc_etf: endpoint {
|
|
remote-endpoint =
|
|
<&tmc_etf_out_replicator_swao>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
replicator_swao_out_replicator_qdss: endpoint {
|
|
remote-endpoint =
|
|
<&replicator_qdss_in_replicator_swao>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
replicator_swao_out_eud: endpoint {
|
|
remote-endpoint =
|
|
<&eud_in_replicator_swao>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
dummy_eud: dummy-eud {
|
|
compatible = "arm,coresight-dummy-sink";
|
|
|
|
coresight-name = "coresight-eud";
|
|
|
|
in-ports {
|
|
port {
|
|
eud_in_replicator_swao: endpoint {
|
|
remote-endpoint =
|
|
<&replicator_swao_out_eud>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
replicator_qdss: replicator@10046000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb909>;
|
|
reg = <0x10046000 0x1000>;
|
|
reg-names = "replicator-base";
|
|
|
|
coresight-name = "coresight-replicator_qdss";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
port {
|
|
replicator_qdss_in_replicator_swao: endpoint {
|
|
remote-endpoint =
|
|
<&replicator_swao_out_replicator_qdss>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
replicator_qdss_out_replicator_etr: endpoint {
|
|
remote-endpoint =
|
|
<&replicator_etr_in_replicator_qdss>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
replicator_etr: replicator@1004e000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb909>;
|
|
reg = <0x1004e000 0x1000>;
|
|
reg-names = "replicator-base";
|
|
|
|
coresight-name = "coresight-replicator_etr";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
port {
|
|
replicator_etr_in_replicator_qdss: endpoint {
|
|
remote-endpoint =
|
|
<&replicator_qdss_out_replicator_etr>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
replicator_etr_out_tmc_etr: endpoint {
|
|
remote-endpoint =
|
|
<&tmc_etr_in_replicator_etr>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
replicator_etr_out_replicator_dummy: endpoint {
|
|
remote-endpoint =
|
|
<&replicator_dummy_in_replicator_etr>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
etr1-replicator {
|
|
compatible = "arm,coresight-static-replicator";
|
|
|
|
coresight-name = "coresight-replicator-etr1";
|
|
|
|
in-ports {
|
|
port {
|
|
replicator_dummy_in_replicator_etr: endpoint {
|
|
remote-endpoint =
|
|
<&replicator_etr_out_replicator_dummy>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
replicator_dummy_out_tmc_modem: endpoint {
|
|
remote-endpoint =
|
|
<&tmc_modem_in_replicator_dummy>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
replicator_dummy_out_tmc_etr1: endpoint {
|
|
remote-endpoint =
|
|
<&tmc_etr1_in_replicator_dummy>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tmc_modem: tmc-modem {
|
|
compatible = "qcom,coresight-secure-etr";
|
|
|
|
coresight-name = "coresight-modem-etr1";
|
|
|
|
real-name = "coresight-tmc-etr1";
|
|
qdss,buffer-size = <0x2000000>;
|
|
qcom,secure-component;
|
|
memory-region = <&qdss_apps_mem>;
|
|
coresight-csr = <&csr>;
|
|
csr-atid-offset = <0x108>;
|
|
csr-irqctrl-offset = <0x70>;
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
port {
|
|
tmc_modem_in_replicator_dummy: endpoint {
|
|
remote-endpoint =
|
|
<&replicator_dummy_out_tmc_modem>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
tmc_modem_out_qmi: endpoint {
|
|
remote-endpoint =
|
|
<&qmi_in_tmc_modem>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tmc_etr: tmc@10048000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb961>;
|
|
reg = <0x10048000 0x1000>;
|
|
reg-names = "tmc-base";
|
|
|
|
coresight-name = "coresight-tmc-etr";
|
|
|
|
qcom,iommu-dma = "bypass";
|
|
iommus = <&apps_smmu 0x04e0 0x0>;
|
|
dma-coherent;
|
|
arm,scatter-gather;
|
|
|
|
//usb_bamless_support;
|
|
qcom,sw-usb;
|
|
coresight-csr = <&csr>;
|
|
csr-atid-offset = <0xf8>;
|
|
csr-irqctrl-offset = <0x6c>;
|
|
byte-cntr-name = "byte-cntr";
|
|
byte-cntr-class-name = "coresight-tmc-etr-stream";
|
|
interrupts = <GIC_SPI 352 IRQ_TYPE_EDGE_RISING>;
|
|
interrupt-names = "byte-cntr-irq";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
port {
|
|
tmc_etr_in_replicator_etr: endpoint {
|
|
remote-endpoint =
|
|
<&replicator_etr_out_tmc_etr>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tmc_etr1: tmc@1004f000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb961>;
|
|
reg = <0x1004f000 0x1000>;
|
|
reg-names = "tmc-base";
|
|
|
|
coresight-name = "coresight-tmc-etr1";
|
|
|
|
iommus = <&apps_smmu 0x0500 0x0>;
|
|
dma-coherent;
|
|
arm,scatter-gather;
|
|
|
|
coresight-csr = <&csr>;
|
|
csr-atid-offset = <0x108>;
|
|
csr-irqctrl-offset = <0x70>;
|
|
byte-cntr-name = "byte-cntr1";
|
|
byte-cntr-class-name = "coresight-tmc-etr1-stream";
|
|
interrupts = <GIC_SPI 362 IRQ_TYPE_EDGE_RISING>;
|
|
interrupt-names = "byte-cntr-irq";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
port {
|
|
tmc_etr1_in_replicator_dummy: endpoint {
|
|
remote-endpoint =
|
|
<&replicator_dummy_out_tmc_etr1>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_wpss: tpdm@10880000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10880000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-wpss";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_wpss_out_funnel_wpss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_wpss_in_tpdm_wpss>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_wpss1: tpdm@10881000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x10881000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-wpss1";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_wpss1_out_funnel_wpss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_wpss_in_tpdm_wpss1>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
funnel_wpss: funnel@10883000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb908>;
|
|
reg = <0x10883000 0x1000>;
|
|
reg-names = "funnel-base";
|
|
|
|
coresight-name = "coresight-funnel-wpss";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_wpss_in_tpdm_wpss: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_wpss_out_funnel_wpss>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
funnel_wpss_in_tpdm_wpss1: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_wpss1_out_funnel_wpss>;
|
|
};
|
|
};
|
|
|
|
port@2 {
|
|
reg = <2>;
|
|
funnel_wpss_in_wpss_etm0: endpoint {
|
|
remote-endpoint =
|
|
<&wpss_etm0_out_funnel_wpss>;
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
out-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_wpss_out_tpda_dl2_4: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_dl2_4_in_funnel_wpss>;
|
|
source = <&tpdm_wpss>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
funnel_wpss_out_tpda_dl2_5: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_dl2_5_in_funnel_wpss>;
|
|
source = <&tpdm_wpss1>;
|
|
};
|
|
};
|
|
|
|
port@2 {
|
|
reg = <2>;
|
|
funnel_wpss_out_funnel_dl2: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_dl2_in_funnel_wpss>;
|
|
source = <&wpss_etm>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpda_dl2: tpda@10c34000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb969>;
|
|
reg = <0x10c34000 0x1000>;
|
|
reg-names = "tpda-base";
|
|
|
|
coresight-name = "coresight-tpda-dl2";
|
|
|
|
qcom,dsb-elem-size = <0 32>;
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@4 {
|
|
reg = <4>;
|
|
tpda_dl2_4_in_funnel_wpss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_wpss_out_tpda_dl2_4>;
|
|
};
|
|
};
|
|
|
|
port@5 {
|
|
reg = <5>;
|
|
tpda_dl2_5_in_funnel_wpss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_wpss_out_tpda_dl2_5>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
tpda_dl2_out_funnel_dl2: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_dl2_in_tpda_dl2>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
funnel_dl2: funnel@10c35000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb908>;
|
|
reg = <0x10c35000 0x1000>;
|
|
reg-names = "funnel-base";
|
|
|
|
coresight-name = "coresight-funnel-dl2";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_dl2_in_tpda_dl2: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_dl2_out_funnel_dl2>;
|
|
};
|
|
};
|
|
|
|
port@2 {
|
|
reg = <2>;
|
|
funnel_dl2_in_funnel_wpss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_wpss_out_funnel_dl2>;
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
funnel_dl2_out_tn_ag: endpoint {
|
|
remote-endpoint =
|
|
<&tn_ag_in_funnel_dl2>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
audio-qmi {
|
|
compatible = "qcom,coresight-qmi";
|
|
|
|
coresight-name = "coresight-qmi-auido";
|
|
qcom,inst-id = <5>;
|
|
|
|
in-ports {
|
|
port@0 {
|
|
reg = <0>;
|
|
qmi_in_audio_etm0: endpoint {
|
|
remote-endpoint =
|
|
<&audio_etm0_out_qmi>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
qmi_in_lpass_stm: endpoint {
|
|
remote-endpoint =
|
|
<&lpass_stm_out_qmi>;
|
|
};
|
|
};
|
|
|
|
port@2 {
|
|
reg = <2>;
|
|
qmi_in_lpass_lpi: endpoint {
|
|
remote-endpoint =
|
|
<&lpass_lpi_out_qmi>;
|
|
};
|
|
};
|
|
|
|
port@3 {
|
|
reg = <3>;
|
|
qmi_in_lpass_rscc: endpoint {
|
|
remote-endpoint =
|
|
<&lpass_rscc_out_qmi>;
|
|
};
|
|
};
|
|
|
|
port@4 {
|
|
reg = <4>;
|
|
qmi_in_lpass_audio: endpoint {
|
|
remote-endpoint =
|
|
<&lpass_audio_out_qmi>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
modem0-qmi {
|
|
compatible = "qcom,coresight-qmi";
|
|
|
|
coresight-name = "coresight-qmi-modem0";
|
|
qcom,inst-id = <2>;
|
|
|
|
in-ports {
|
|
port@0 {
|
|
reg = <0>;
|
|
qmi_in_modem_etm0: endpoint {
|
|
remote-endpoint =
|
|
<&modem_etm0_out_qmi>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
qmi_in_tmc_modem: endpoint {
|
|
remote-endpoint =
|
|
<&tmc_modem_out_qmi>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
modem2-qmi {
|
|
compatible = "qcom,coresight-qmi";
|
|
|
|
coresight-name = "coresight-qmi-modem2";
|
|
qcom,inst-id = <11>;
|
|
|
|
in-ports {
|
|
port {
|
|
qmi_in_modem2_etm0: endpoint {
|
|
remote-endpoint =
|
|
<&modem2_etm0_out_qmi>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
cti@10010000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10010000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-qdss";
|
|
|
|
qcom,extended_cti;
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
wpss_cti: cti@10882000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10882000 0x1000>;
|
|
|
|
status = "disabled";
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-wpss";
|
|
qcom,extended_cti;
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
cti@1088b000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x1088b000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-wpss-q6";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
swao_cti: cti@10b00000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10b00000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-swao";
|
|
qcom,extended_cti;
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
cti@10b21000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10b21000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-aoss";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
cti@10a05000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10a05000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-camera";
|
|
|
|
qcom,extended_cti;
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
cti@1098b000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x1098b000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-turing_qdsp";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
cti@10982000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10982000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-turing";
|
|
|
|
qcom,extended_cti;
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
cti@10c32000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10c32000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-dl2-cti0";
|
|
|
|
qcom,extended_cti;
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
cti@10c33000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10c33000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-dl2-cti1";
|
|
|
|
qcom,extended_cti;
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
cti@10d21000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10d21000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-ddr_shrm";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
cti@10b35000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10b35000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-ddr_lpi";
|
|
|
|
qcom,extended_cti;
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
cti@10d05000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10d05000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-ddr_center";
|
|
|
|
qcom,extended_cti;
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
cti@10d07000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10d07000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-ddr_chhm02";
|
|
|
|
qcom,extended_cti;
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
cti@10d09000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10d09000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-ddr_chhm13";
|
|
|
|
qcom,extended_cti;
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
cti@10c62000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10c62000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-mdss";
|
|
|
|
qcom,extended_cti;
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
cti@10961000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10961000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-a6x_isdb";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
cti@10962000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10962000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-a6x_gpmu";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
cti@10901000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10901000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-a6x_dragonlink";
|
|
|
|
qcom,extended_cti;
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
cti@10b42000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10b42000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-lpass_lpi";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
cti@10b4b000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10b4b000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-lpass_lpi_qdsp";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
cti@10b41000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10b41000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-lpass_lpi_cti_1";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
cti@10b51000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10b51000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-lpass_lpi_cti_3";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
cti@10b85000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10b85000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-lpass";
|
|
|
|
qcom,extended_cti;
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
cti@10813000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10813000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-mss_vdsp6";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
cti@1080b000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x1080b000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-mss_qdsp6";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
cti@10802000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10802000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-mss";
|
|
|
|
qcom,extended_cti;
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
cti@10cd1000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10cd1000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-tmess_rvss";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
cti@10cc2000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10cc2000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-tmess_dragonlink_cti0";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
qcom,extended_cti;
|
|
status = "disabled";
|
|
};
|
|
|
|
cti@10cc3000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10cc3000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-tmess_dragonlink_cti1";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
qcom,extended_cti;
|
|
status = "disabled";
|
|
};
|
|
|
|
cti@109b0000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x109b0000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-trace_noc_cti0";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
qcom,extended_cti;
|
|
};
|
|
|
|
cti@109b1000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x109b1000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-trace_noc_cti1";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
qcom,extended_cti;
|
|
};
|
|
|
|
cti@109b2000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x109b2000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-trace_noc_cti2";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
qcom,extended_cti;
|
|
};
|
|
|
|
cti@109c1000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x109c1000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-eva";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
qcom,extended_cti;
|
|
};
|
|
|
|
cti@10ba5000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10ba5000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-soccp";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
qcom,extended_cti;
|
|
};
|
|
|
|
cti@10831000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10831000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-venus";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
qcom,extended_cti;
|
|
};
|
|
|
|
cti@10c2a000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10c2a000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-dl3";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
qcom,extended_cti;
|
|
};
|
|
|
|
cti@10c2b000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10c2b000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-dl3-1";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
qcom,extended_cti;
|
|
};
|
|
|
|
cti@10c12000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10c12000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-dl4";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
qcom,extended_cti;
|
|
};
|
|
|
|
cti@10c13000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x10c13000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-dl4-1";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
qcom,extended_cti;
|
|
};
|
|
|
|
cti@13863000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x13863000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-apss-dl";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
qcom,extended_cti;
|
|
};
|
|
|
|
cti@138e0000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x138e0000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-apss_cti_0";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
cti@138e1000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x138e1000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-apss_cti_3";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
cti@138e2000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x138e2000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-apss_cti_4";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
cti@138f0000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x138f0000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-apss_cti_1";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
cti@13900000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x13900000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-apss_cti_2";
|
|
|
|
clocks = <&aoss_qmp>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|