115 lines
3.2 KiB
Plaintext
115 lines
3.2 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <dt-bindings/interconnect/qcom,sun.h>
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#include <dt-bindings/clock/qcom,rpmh.h>
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&pm8550ve_f_gpios {
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bt_en: bt_en {
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pins = "gpio3";
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function = "normal";
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input-disable;
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output-enable;
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bias-disable;
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power-source = <1>;
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};
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bt_fmd_clk_en: bt_fmd_clk_en {
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pins = "gpio6";
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function = "normal";
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input-enable;
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output-disable;
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bias-disable;
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power-source = <1>;
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};
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};
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&tlmm {
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cnss_bt_sw_ctrl: cnss_wlan_sw_ctrl {
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mux {
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pins = "gpio18";
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function = "wcn_sw_ctrl";
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};
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};
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};
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&soc {
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bluetooth: wcn786x {
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compatible = "qcom,wcn786x";
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nvmem-cells = <&fmd_set>, <&fmd_chg_pon>, <&fmd_cnt2_stop>;
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nvmem-cell-names = "fmd_set", "fmd_chg_pon", "fmd_cnt2_stop";
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clocks = <&rpmhcc RPMH_RF_CLK1>;
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clock-names = "bt_rf_clk1";
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qcom,wcn786x;
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pinctrl-names = "bt_en", "sw_ctrl", "bt_fmd_clk_en";
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pinctrl-0 = <&bt_en>;
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pinctrl-1 = <&cnss_bt_sw_ctrl>;
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pinctrl-2 = <&bt_fmd_clk_en>;
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/* List of GPIOs to be setup for interrupt wakeup capable*/
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mpm_wake_set_gpios = <18 9>;
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qcom,wl-reset-gpio = <&tlmm 16 0>; /* WL_EN */
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qcom,bt-sw-ctrl-gpio = <&tlmm 18 0>; /* SW_CTRL */
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qcom,bt-fmd-clk-gpio = <&pm8550ve_f_gpios 6 0>; /* FMD_CLK_CTRL */
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qcom,bt-reset-gpio = <&pm8550ve_f_gpios 3 0>; /* BT_EN */
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qcom,qmp = <&aoss_qmp>;
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qcom,bt-vdd18-aon-supply = <&L3F>; /* VDD1P8_AON */
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qcom,bt-vdd12-io-supply = <&L2F>; /* VDD1P2_IO */
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qcom,bt-ant-ldo-supply = <&L6K>; /* AV91C_VDD Extractor */
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/* This buck is added for HW WAR */
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qcom,bt-vdd-dig-supply = <&S4D>; /* BT CX_MX LDO */
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qcom,bt-vdd-aon-supply = <&S5F>; /* RFA_CMN/AON */
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qcom,bt-vdd-rfa0p75-supply = <&S5F>; /* RFA_OP75 */
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qcom,bt-vdd-rfa1p8-supply = <&S3G>; /* RFA_1P8 */
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qcom,bt-vdd-rfa1p25-supply = <&S7I>; /* RFA_1P2 */
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qcom,bt-vdd18-aon-config = <1800000 1800000 30000 1 1>;
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qcom,bt-vdd12-io-config = <1200000 1200000 30000 1 1>;
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qcom,bt-ant-ldo-config = <1800000 1860000 0 1 0>;
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qcom,bt-vdd-aon-config = <876000 1000000 0 1 1>;
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qcom,bt-vdd-dig-config = <560000 1036000 0 1 0>;
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qcom,bt-vdd-rfa0p75-config = <876000 1000000 0 1 0>;
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qcom,bt-vdd-rfa1p8-config = <1860000 2000000 0 1 0>;
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qcom,bt-vdd-rfa1p25-config = <1312000 1340000 0 1 0>;
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/* WLAN regulator for FMD operation, and to be used only in GNG/BRH 2.0 */
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qcom,bt-vdd-wlan-aon-supply = <&S4D>;
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qcom,bt-vdd-wlan-aon-config = <876000 1036000 0 0 1>;
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qcom,pdc_init_table =
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"{class: wlan_pdc, ss: rf, res: s5f.m, enable: 1}",
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"{class: wlan_pdc, ss: rf, res: s5f.v, enable: 1}",
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"{class: wlan_pdc, ss: rf, res: s5f.v, upval: 876}",
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"{class: wlan_pdc, ss: rf, res: s5f.v, dwnval: 876}";
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};
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};
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&swr4 {
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btswr_slave: btswr-slave {
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compatible = "qcom,btfmswr_slave";
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reg = <0x02 0x08170220>;
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};
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};
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// FM changes
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&qupv3_se5_i2c {
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status = "ok";
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nq@64 {
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compatible = "rtc6226";
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reg = <0x64>;
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fmint-gpio = <&tlmm 84 0>;
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vdd-supply = <&L16B>;
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rtc6226,vdd-supply-voltage = <2800000 2800000>;
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rtc6226,vdd-load = <15000>;
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vio-supply = <&L15B>;
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rtc6226,vio-supply-voltage = <1800000 1800000>;
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};
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};
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//uart instance
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&qupv3_se14_4uart {
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status = "ok";
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};
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