This update adjusts the PHY timings for the VTDR command mode panel on Kera RCM/CDP platforms based on the required FPS, following the removal of the qcom,mdss-dsi-panel-clockrate hardcoding. Previously, the hardcoding resulted in uniform panel PHY timings across all FPS. Some Kera RCMs have exhibited screen freeze issues when switching from 120 FPS to 60 FPS in command mode after the removal of the hardcoded clock rate. Interestingly, this issue has not been observed on Kera CDPs and other platforms, suggesting potential underlying hardware differences between CDPs and RCMs that necessitate proper tuning of panel PHY timings. Update the panel PHY timings to fix this. Fixes: I1c3c77eed76 ("ARM: dts: msm: remove hard coded panel clk rate for kera RCM"). Change-Id: Iffd1d5da485d6961baa49ff96a65882c491a8ff6 Signed-off-by: Abhinav Saurabh <quic_abhisaur@quicinc.com>
317 lines
9.6 KiB
Plaintext
317 lines
9.6 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
|
|
/*
|
|
* Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
|
|
*/
|
|
|
|
#include "kera-sde-display.dtsi"
|
|
|
|
&pmxr2230_gpios {
|
|
lcd_backlight_ctrl {
|
|
lcd_backlight_en_default: lcd_backlight_en_default {
|
|
pins = "gpio2";
|
|
function = "normal";
|
|
input-disable;
|
|
output-enable;
|
|
bias-disable;
|
|
power-source = <1>;
|
|
qcom,drive-strength = <3>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pm8550vs_g_gpios {
|
|
display_panel_avdd_default: display_panel_avdd_default {
|
|
pins = "gpio5";
|
|
function = "normal";
|
|
input-disable;
|
|
output-enable;
|
|
bias-disable;
|
|
power-source = <1>;
|
|
qcom,drive-strength = <3>;
|
|
};
|
|
};
|
|
|
|
&soc {
|
|
display_panel_avdd: display_gpio_regulator@1 {
|
|
compatible = "qti-regulator-fixed";
|
|
regulator-name = "display_panel_avdd";
|
|
regulator-min-microvolt = <5500000>;
|
|
regulator-max-microvolt = <5500000>;
|
|
regulator-enable-ramp-delay = <233>;
|
|
gpio = <&pm8550vs_g_gpios 5 0>;
|
|
enable-active-high;
|
|
regulator-boot-on;
|
|
proxy-supply = <&display_panel_avdd>;
|
|
qcom,proxy-consumer-enable;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&display_panel_avdd_default>;
|
|
};
|
|
};
|
|
|
|
&dsi_vtdr6130_amoled_cmd {
|
|
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
|
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
|
|
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
qcom,mdss-dsi-bl-min-level = <10>;
|
|
qcom,mdss-dsi-bl-max-level = <4095>;
|
|
qcom,mdss-brightness-max-level = <8191>;
|
|
qcom,mdss-dsi-bl-inverted-dbv;
|
|
qcom,platform-reset-gpio = <&tlmm 12 0>;
|
|
qcom,platform-sec-reset-gpio = <&tlmm 127 0>;
|
|
|
|
qcom,mdss-dsi-display-timings {
|
|
timing@0 {
|
|
/delete-property/ qcom,mdss-dsi-panel-clockrate;
|
|
};
|
|
|
|
timing@1 {
|
|
/delete-property/ qcom,mdss-dsi-panel-clockrate;
|
|
qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07
|
|
07 08 02 04 00 19 0c];
|
|
};
|
|
|
|
timing@2 {
|
|
/delete-property/ qcom,mdss-dsi-panel-clockrate;
|
|
qcom,mdss-dsi-panel-phy-timings = [00 13 05 04 13 1e 05
|
|
05 06 02 04 00 12 0a];
|
|
};
|
|
|
|
timing@3 {
|
|
/delete-property/ qcom,mdss-dsi-panel-clockrate;
|
|
qcom,mdss-dsi-panel-phy-timings = [00 0f 03 03 11 1d 04
|
|
04 03 02 04 00 0d 09];
|
|
};
|
|
};
|
|
};
|
|
|
|
&dsi_vtdr6130_amoled_video {
|
|
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
|
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
|
|
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
qcom,mdss-dsi-bl-min-level = <10>;
|
|
qcom,mdss-dsi-bl-max-level = <4095>;
|
|
qcom,mdss-brightness-max-level = <8191>;
|
|
qcom,mdss-dsi-bl-inverted-dbv;
|
|
qcom,platform-reset-gpio = <&tlmm 12 0>;
|
|
qcom,platform-sec-reset-gpio = <&tlmm 127 0>;
|
|
};
|
|
|
|
&dsi_vtdr6130_amoled_120hz_cmd {
|
|
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
|
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
|
|
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
qcom,mdss-dsi-bl-min-level = <10>;
|
|
qcom,mdss-dsi-bl-max-level = <4095>;
|
|
qcom,mdss-brightness-max-level = <8191>;
|
|
qcom,mdss-dsi-bl-inverted-dbv;
|
|
qcom,platform-reset-gpio = <&tlmm 12 0>;
|
|
qcom,platform-sec-reset-gpio = <&tlmm 127 0>;
|
|
|
|
qcom,mdss-dsi-display-timings {
|
|
timing@0 {
|
|
/delete-property/ qcom,mdss-dsi-panel-clockrate;
|
|
};
|
|
|
|
timing@1 {
|
|
/delete-property/ qcom,mdss-dsi-panel-clockrate;
|
|
qcom,mdss-dsi-panel-phy-timings = [00 13 05 04 13 1e 05
|
|
05 06 02 04 00 12 0a];
|
|
};
|
|
|
|
timing@2 {
|
|
/delete-property/ qcom,mdss-dsi-panel-clockrate;
|
|
qcom,mdss-dsi-panel-phy-timings = [00 0f 03 03 11 1d 04
|
|
04 03 02 04 00 0d 09];
|
|
};
|
|
};
|
|
};
|
|
|
|
&dsi_vtdr6130_amoled_120hz_video {
|
|
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
|
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
|
|
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
qcom,mdss-dsi-bl-min-level = <10>;
|
|
qcom,mdss-dsi-bl-max-level = <4095>;
|
|
qcom,mdss-brightness-max-level = <8191>;
|
|
qcom,mdss-dsi-bl-inverted-dbv;
|
|
qcom,platform-reset-gpio = <&tlmm 12 0>;
|
|
qcom,platform-sec-reset-gpio = <&tlmm 127 0>;
|
|
};
|
|
|
|
&dsi_vtdr6130_amoled_90hz_cmd {
|
|
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
|
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
|
|
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
qcom,mdss-dsi-bl-min-level = <10>;
|
|
qcom,mdss-dsi-bl-max-level = <4095>;
|
|
qcom,mdss-brightness-max-level = <8191>;
|
|
qcom,mdss-dsi-bl-inverted-dbv;
|
|
qcom,platform-reset-gpio = <&tlmm 12 0>;
|
|
qcom,platform-sec-reset-gpio = <&tlmm 127 0>;
|
|
|
|
qcom,mdss-dsi-display-timings {
|
|
timing@0 {
|
|
/delete-property/ qcom,mdss-dsi-panel-clockrate;
|
|
};
|
|
|
|
timing@1 {
|
|
/delete-property/ qcom,mdss-dsi-panel-clockrate;
|
|
qcom,mdss-dsi-panel-phy-timings = [00 0f 03 03 11 1d 04
|
|
04 03 02 04 00 0d 09];
|
|
};
|
|
};
|
|
};
|
|
|
|
&dsi_vtdr6130_amoled_90hz_video {
|
|
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
|
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
|
|
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
qcom,mdss-dsi-bl-min-level = <10>;
|
|
qcom,mdss-dsi-bl-max-level = <4095>;
|
|
qcom,mdss-brightness-max-level = <8191>;
|
|
qcom,mdss-dsi-bl-inverted-dbv;
|
|
qcom,platform-reset-gpio = <&tlmm 12 0>;
|
|
qcom,platform-sec-reset-gpio = <&tlmm 127 0>;
|
|
};
|
|
|
|
&dsi_vtdr6130_amoled_60hz_cmd {
|
|
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
|
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
|
|
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
qcom,mdss-dsi-bl-min-level = <10>;
|
|
qcom,mdss-dsi-bl-max-level = <4095>;
|
|
qcom,mdss-brightness-max-level = <8191>;
|
|
qcom,mdss-dsi-bl-inverted-dbv;
|
|
qcom,platform-reset-gpio = <&tlmm 12 0>;
|
|
qcom,platform-sec-reset-gpio = <&tlmm 127 0>;
|
|
};
|
|
|
|
&dsi_vtdr6130_amoled_60hz_video {
|
|
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
|
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
|
|
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
qcom,mdss-dsi-bl-min-level = <10>;
|
|
qcom,mdss-dsi-bl-max-level = <4095>;
|
|
qcom,mdss-brightness-max-level = <8191>;
|
|
qcom,mdss-dsi-bl-inverted-dbv;
|
|
qcom,platform-reset-gpio = <&tlmm 12 0>;
|
|
qcom,platform-sec-reset-gpio = <&tlmm 127 0>;
|
|
};
|
|
|
|
&dsi_vtdr6130_amoled_qsync_144hz_cmd {
|
|
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
|
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
|
|
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
qcom,mdss-dsi-bl-min-level = <10>;
|
|
qcom,mdss-dsi-bl-max-level = <4095>;
|
|
qcom,mdss-brightness-max-level = <8191>;
|
|
qcom,mdss-dsi-bl-inverted-dbv;
|
|
qcom,platform-reset-gpio = <&tlmm 12 0>;
|
|
qcom,platform-sec-reset-gpio = <&tlmm 127 0>;
|
|
};
|
|
|
|
&dsi_vtdr6130_amoled_qsync_144hz_video {
|
|
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
|
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
|
|
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
qcom,mdss-dsi-bl-min-level = <10>;
|
|
qcom,mdss-dsi-bl-max-level = <4095>;
|
|
qcom,mdss-brightness-max-level = <8191>;
|
|
qcom,mdss-dsi-bl-inverted-dbv;
|
|
qcom,platform-reset-gpio = <&tlmm 12 0>;
|
|
qcom,platform-sec-reset-gpio = <&tlmm 127 0>;
|
|
};
|
|
|
|
&dsi_sharp_qhd_plus_dsc_cmd {
|
|
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_lcd>;
|
|
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
|
|
qcom,mdss-dsi-bl-min-level = <1>;
|
|
qcom,mdss-dsi-bl-max-level = <4095>;
|
|
qcom,platform-reset-gpio = <&tlmm 12 0>;
|
|
qcom,platform-bklight-en-gpio = <&pmxr2230_gpios 2 0>;
|
|
};
|
|
|
|
&dsi_sharp_qhd_plus_dsc_video {
|
|
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_lcd>;
|
|
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
|
|
qcom,mdss-dsi-bl-min-level = <1>;
|
|
qcom,mdss-dsi-bl-max-level = <4095>;
|
|
qcom,platform-reset-gpio = <&tlmm 12 0>;
|
|
qcom,platform-bklight-en-gpio = <&pmxr2230_gpios 2 0>;
|
|
};
|
|
|
|
&dsi_sim_cmd {
|
|
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
|
|
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
};
|
|
|
|
&dsi_sim_vid {
|
|
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
|
|
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
};
|
|
|
|
&dsi_sim_dsc_375_cmd {
|
|
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
|
|
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
};
|
|
|
|
&dsi_sim_dsc_10b_cmd {
|
|
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
|
|
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
};
|
|
|
|
&dsi_dual_sim_vid {
|
|
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
|
|
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
};
|
|
|
|
&dsi_dual_sim_cmd {
|
|
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
|
|
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
qcom,bl-dsc-cmd-state = "dsi_lp_mode";
|
|
};
|
|
|
|
&dsi_dual_sim_dsc_375_cmd {
|
|
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
|
|
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
};
|
|
|
|
&dsi_sim_sec_hd_cmd {
|
|
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
|
|
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply_sim>;
|
|
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
|
|
qcom,mdss-dsi-bl-min-level = <1>;
|
|
qcom,mdss-dsi-bl-max-level = <1023>;
|
|
};
|
|
|
|
&sde_dsi {
|
|
avdd-supply = <&display_panel_avdd>;
|
|
qcom,dsi-default-panel = <&dsi_vtdr6130_amoled_cmd>;
|
|
};
|
|
|
|
&qupv3_se8_spi {
|
|
goodix-berlin@0 {
|
|
panel = <&dsi_vtdr6130_amoled_cmd
|
|
&dsi_vtdr6130_amoled_video
|
|
&dsi_vtdr6130_amoled_120hz_cmd
|
|
&dsi_vtdr6130_amoled_120hz_video
|
|
&dsi_vtdr6130_amoled_90hz_cmd
|
|
&dsi_vtdr6130_amoled_90hz_video
|
|
&dsi_vtdr6130_amoled_60hz_cmd
|
|
&dsi_vtdr6130_amoled_60hz_video
|
|
&dsi_vtdr6130_amoled_qsync_144hz_cmd
|
|
&dsi_vtdr6130_amoled_qsync_144hz_video>;
|
|
};
|
|
};
|