acc834e002
This change adds SDIO support for monaco. Change-Id: I1ce969435b01cad2f65de025deea6c545e7adfbf Signed-off-by: mxing <quic_mxing@quicinc.com>
1669 lines
28 KiB
Plaintext
1669 lines
28 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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&soc {
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tlmm: pinctrl@500000 {
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compatible = "qcom,monaco-tlmm";
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reg = <0x500000 0x300000>;
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interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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wakeup-parent = <&mpm>;
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qupv3_se6_2uart_pins: qupv3_se6_2uart_pins {
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qupv3_se6_2uart_tx_active: qupv3_se6_2uart_tx_active {
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mux {
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pins = "gpio30";
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function = "qup06";
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};
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config {
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pins = "gpio30";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se6_2uart_rx_active: qupv3_se6_2uart_rx_active {
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mux {
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pins = "gpio31";
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function = "qup06";
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};
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config {
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pins = "gpio31";
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drive-strength= <2>;
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bias-disable;
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};
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};
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qupv3_se6_2uart_sleep: qupv3_se6_2uart_sleep {
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mux {
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pins = "gpio30", "gpio31";
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function = "gpio";
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};
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config {
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pins = "gpio30", "gpio31";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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};
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qupv3_se0_i2c_pins: qupv3_se0_i2c_pins {
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qupv3_se0_i2c_sda_active: qupv3_se0_i2c_sda_active {
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mux {
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pins = "gpio4";
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function = "qup00";
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};
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config {
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pins = "gpio4";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se0_i2c_scl_active: qupv3_se0_i2c_scl_active {
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mux {
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pins = "gpio5";
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function = "qup00";
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};
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config {
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pins = "gpio5";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se0_i2c_sleep: qupv3_se0_i2c_sleep {
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mux {
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pins = "gpio4", "gpio5";
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function = "gpio";
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};
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config {
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pins = "gpio4", "gpio5";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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nfc {
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nfc_int_active: nfc_int_active {
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/* active state */
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mux {
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/* NFC Read Interrupt */
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pins = "gpio7";
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function = "gpio";
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};
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config {
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pins = "gpio7";
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drive-strength = <2>; /* 2 MA */
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bias-pull-up;
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};
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};
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nfc_int_suspend: nfc_int_suspend {
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/* sleep state */
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mux {
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/* NFC Read Interrupt */
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pins = "gpio7";
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function = "gpio";
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};
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config {
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pins = "gpio7";
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drive-strength = <2>; /* 2 MA */
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bias-pull-up;
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};
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};
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nfc_enable_active: nfc_enable_active {
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/* active state */
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mux {
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/* Enable, Firmware gpios */
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pins = "gpio6", "gpio8";
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function = "gpio";
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};
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config {
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pins = "gpio6", "gpio8";
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drive-strength = <2>; /* 2 MA */
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bias-pull-up;
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};
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};
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nfc_enable_suspend: nfc_enable_suspend {
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/* sleep state */
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mux {
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/* Enable, Firmware gpios */
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pins = "gpio6", "gpio8";
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function = "gpio";
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};
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config {
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pins = "gpio6", "gpio8";
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drive-strength = <2>; /* 2 MA */
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bias-disable;
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};
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};
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};
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qupv3_se0_spi_pins: qupv3_se0_spi_pins {
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qupv3_se0_spi_miso_active: qupv3_se0_spi_miso_active {
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mux {
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pins = "gpio4";
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function = "qup00";
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};
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config {
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pins = "gpio4";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se0_spi_mosi_active: qupv3_se0_spi_mosi_active {
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mux {
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pins = "gpio5";
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function = "qup00";
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};
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config {
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pins = "gpio5";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se0_spi_clk_active: qupv3_se0_spi_clk_active {
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mux {
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pins = "gpio6";
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function = "qup00";
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};
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config {
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pins = "gpio6";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se0_spi_cs_active: qupv3_se0_spi_cs_active {
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mux {
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pins = "gpio7";
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function = "qup00";
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};
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config {
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pins = "gpio7";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se0_spi_sleep: qupv3_se0_spi_sleep {
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mux {
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pins = "gpio4", "gpio5",
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"gpio6", "gpio7";
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function = "gpio";
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};
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config {
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pins = "gpio4", "gpio5",
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"gpio6", "gpio7";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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qupv3_se1_i2c_pins: qupv3_se1_i2c_pins {
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qupv3_se1_i2c_sda_active: qupv3_se1_i2c_sda_active {
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mux {
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pins = "gpio10";
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function = "qup01";
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};
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config {
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pins = "gpio10";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se1_i2c_scl_active: qupv3_se1_i2c_scl_active {
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mux {
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pins = "gpio11";
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function = "qup01";
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};
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config {
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pins = "gpio11";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se1_i2c_sleep: qupv3_se1_i2c_sleep {
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mux {
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pins = "gpio10", "gpio11";
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function = "gpio";
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};
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config {
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pins = "gpio10", "gpio11";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se1_spi_pins: qupv3_se1_spi_pins {
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qupv3_se1_spi_miso_active: qupv3_se1_spi_miso_active {
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mux {
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pins = "gpio10";
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function = "qup01";
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};
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config {
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pins = "gpio10";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se1_spi_mosi_active: qupv3_se1_spi_mosi_active {
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mux {
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pins = "gpio11";
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function = "qup01";
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};
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config {
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pins = "gpio11";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se1_spi_clk_active: qupv3_se1_spi_clk_active {
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mux {
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pins = "gpio12";
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function = "qup01";
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};
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config {
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pins = "gpio12";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se1_spi_cs_active: qupv3_se1_spi_cs_active {
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mux {
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pins = "gpio13";
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function = "qup01";
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};
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config {
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pins = "gpio13";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se1_spi_sleep: qupv3_se1_spi_sleep {
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mux {
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pins = "gpio10", "gpio11",
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"gpio12", "gpio13";
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function = "gpio";
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};
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config {
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pins = "gpio10", "gpio11",
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"gpio12", "gpio13";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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qupv3_se2_i2c_pins: qupv3_se2_i2c_pins {
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qupv3_se2_i2c_sda_active: qupv3_se2_i2c_sda_active {
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mux {
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pins = "gpio0";
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function = "qup02";
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};
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config {
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pins = "gpio0";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se2_i2c_scl_active: qupv3_se2_i2c_scl_active {
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mux {
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pins = "gpio1";
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function = "qup02";
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};
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config {
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pins = "gpio1";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se2_i2c_sleep: qupv3_se2_i2c_sleep {
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mux {
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pins = "gpio0", "gpio1";
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function = "gpio";
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};
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config {
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pins = "gpio0", "gpio1";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se2_spi_pins: qupv3_se2_spi_pins {
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qupv3_se2_spi_miso_active: qupv3_se2_spi_miso_active {
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mux {
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pins = "gpio0";
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function = "qup02";
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};
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config {
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pins = "gpio0";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se2_spi_mosi_active: qupv3_se2_spi_mosi_active {
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mux {
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pins = "gpio1";
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function = "qup02";
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};
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config {
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pins = "gpio1";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se2_spi_clk_active: qupv3_se2_spi_clk_active {
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mux {
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pins = "gpio2";
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function = "qup02";
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};
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config {
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pins = "gpio2";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se2_spi_cs_active: qupv3_se2_spi_cs_active {
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mux {
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pins = "gpio3";
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function = "qup02";
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};
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config {
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pins = "gpio3";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se2_spi_sleep: qupv3_se2_spi_sleep {
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mux {
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pins = "gpio0", "gpio1",
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"gpio2", "gpio3";
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function = "gpio";
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};
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config {
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pins = "gpio0", "gpio1",
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"gpio2", "gpio3";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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qupv3_se3_i2c_pins: qupv3_se3_i2c_pins {
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qupv3_se3_i2c_sda_active: qupv3_se3_i2c_sda_active {
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mux {
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pins = "gpio14";
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function = "qup03";
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};
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config {
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pins = "gpio14";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se3_i2c_scl_active: qupv3_se3_i2c_scl_active {
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mux {
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pins = "gpio15";
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function = "qup03";
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};
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config {
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pins = "gpio15";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se3_i2c_sleep: qupv3_se3_i2c_sleep {
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mux {
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pins = "gpio14", "gpio15";
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function = "gpio";
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};
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config {
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pins = "gpio14", "gpio15";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se3_spi_pins: qupv3_se3_spi_pins {
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qupv3_se3_spi_miso_active: qupv3_se3_spi_miso_active {
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mux {
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pins = "gpio14";
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function = "qup03";
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};
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config {
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pins = "gpio14";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se3_spi_mosi_active: qupv3_se3_spi_mosi_active {
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mux {
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pins = "gpio15";
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function = "qup03";
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};
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config {
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pins = "gpio15";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se3_spi_clk_active: qupv3_se3_spi_clk_active {
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mux {
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pins = "gpio16";
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function = "qup03";
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};
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config {
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pins = "gpio16";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se3_spi_cs_active: qupv3_se3_spi_cs_active {
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mux {
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pins = "gpio17";
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function = "qup03";
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};
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config {
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pins = "gpio17";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se3_spi_sleep: qupv3_se3_spi_sleep {
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mux {
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pins = "gpio14", "gpio15",
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"gpio16", "gpio17";
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function = "gpio";
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};
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config {
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pins = "gpio14", "gpio15",
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"gpio16", "gpio17";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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qupv3_se4_i2c_pins: qupv3_se4_i2c_pins {
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qupv3_se4_i2c_sda_active: qupv3_se4_i2c_sda_active {
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mux {
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pins = "gpio20";
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function = "qup04";
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};
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config {
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pins = "gpio20";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se4_i2c_scl_active: qupv3_se4_i2c_scl_active {
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mux {
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pins = "gpio21";
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function = "qup04";
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};
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config {
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pins = "gpio21";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se4_i2c_sleep: qupv3_se4_i2c_sleep {
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mux {
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pins = "gpio20", "gpio21";
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function = "gpio";
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};
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config {
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pins = "gpio20", "gpio21";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se4_spi_pins: qupv3_se4_spi_pins {
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qupv3_se4_spi_miso_active: qupv3_se4_spi_miso_active {
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mux {
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pins = "gpio20";
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function = "qup04";
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};
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config {
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pins = "gpio20";
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drive-strength = <6>;
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bias-disable;
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};
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};
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|
|
qupv3_se4_spi_mosi_active: qupv3_se4_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio21";
|
|
function = "qup04";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio21";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_clk_active: qupv3_se4_spi_clk_active {
|
|
mux {
|
|
pins = "gpio22";
|
|
function = "qup04";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio22";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_cs_active: qupv3_se4_spi_cs_active {
|
|
mux {
|
|
pins = "gpio23";
|
|
function = "qup04";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio23";
|
|
drive-strength = <6>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_sleep: qupv3_se4_spi_sleep {
|
|
mux {
|
|
pins = "gpio20", "gpio21",
|
|
"gpio22";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio20", "gpio21",
|
|
"gio22";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_cs_sleep: qupv3_se4_spi_cs_sleep {
|
|
mux {
|
|
pins = "gpio23";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio23";
|
|
drive-strength = <6>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se5_i2c_pins: qupv3_se5_i2c_pins {
|
|
qupv3_se5_i2c_sda_active: qupv3_se5_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio26";
|
|
function = "qup05";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio26";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_i2c_scl_active: qupv3_se5_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio27";
|
|
function = "qup05";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio27";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_i2c_sleep: qupv3_se5_i2c_sleep {
|
|
mux {
|
|
pins = "gpio26", "gpio27";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio26", "gpio27";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_pins: qupv3_se5_spi_pins {
|
|
qupv3_se5_spi_miso_active: qupv3_se5_spi_miso_active {
|
|
mux {
|
|
pins = "gpio26";
|
|
function = "qup05";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio26";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_mosi_active: qupv3_se5_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio27";
|
|
function = "qup05";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio21";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_clk_active: qupv3_se5_spi_clk_active {
|
|
mux {
|
|
pins = "gpio28";
|
|
function = "qup05";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio28";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_cs_active: qupv3_se5_spi_cs_active {
|
|
mux {
|
|
pins = "gpio29";
|
|
function = "qup05";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio29";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_sleep: qupv3_se5_spi_sleep {
|
|
mux {
|
|
pins = "gpio26", "gpio27",
|
|
"gpio28", "gpio29";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio26", "gpio27",
|
|
"gpio28", "gpio29";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se6_i2c_pins: qupv3_se6_i2c_pins {
|
|
qupv3_se6_i2c_sda_active: qupv3_se6_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio24";
|
|
function = "qup06";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio24";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_i2c_scl_active: qupv3_se6_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio25";
|
|
function = "qup06";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio25";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_i2c_sleep: qupv3_se6_i2c_sleep {
|
|
mux {
|
|
pins = "gpio24", "gpio25";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio24", "gpio25";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_pins: qupv3_se6_spi_pins {
|
|
qupv3_se6_spi_miso_active: qupv3_se6_spi_miso_active {
|
|
mux {
|
|
pins = "gpio24";
|
|
function = "qup06";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio24";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_mosi_active: qupv3_se6_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio25";
|
|
function = "qup06";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio25";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_clk_active: qupv3_se6_spi_clk_active {
|
|
mux {
|
|
pins = "gpio30";
|
|
function = "qup06";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio30";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_cs_active: qupv3_se6_spi_cs_active {
|
|
mux {
|
|
pins = "gpio31";
|
|
function = "qup06";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio33";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_sleep: qupv3_se6_spi_sleep {
|
|
mux {
|
|
pins = "gpio24", "gpio25",
|
|
"gpio30", "gpio31";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio24", "gpio25",
|
|
"gpio30", "gpio31";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se7_i2c_pins_a: qupv3_se7_i2c_pins_a {
|
|
qupv3_se7_i2c_sda_a: qupv3_se7_i2c_sda_a {
|
|
mux {
|
|
pins = "gpio101";
|
|
function = "QUP0_L0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio101";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_i2c_scl_a: qupv3_se7_i2c_scl_a {
|
|
mux {
|
|
pins = "gpio102";
|
|
function = "QUP0_L1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio102";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_i2c_sleep_a: qupv3_se7_i2c_sleep_a {
|
|
mux {
|
|
pins = "gpio101", "gpio102";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio101", "gpio102";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se7_spi_pins_a: qupv3_se7_spi_pins_a {
|
|
qupv3_se7_spi_mosi_a: qupv3_se7_spi_mosi_a {
|
|
mux {
|
|
pins = "gpio101";
|
|
function = "QUP0_L0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio101";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_spi_miso_a: qupv3_se7_spi_miso_a {
|
|
mux {
|
|
pins = "gpio102";
|
|
function = "QUP0_L1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio102";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_spi_clk_a: qupv3_se7_spi_clk_a {
|
|
mux {
|
|
pins = "gpio104";
|
|
function = "QUP0_L2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio104";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_spi_cs_a: qupv3_se7_spi_cs_a {
|
|
mux {
|
|
pins = "gpio105";
|
|
function = "QUP0_L3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio105";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_spi_sleep_a: qupv3_se7_spi_sleep_a {
|
|
mux {
|
|
pins = "gpio101", "gpio102",
|
|
"gpio104", "gpio105";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio101", "gpio102",
|
|
"gpio104", "gpio105";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se7_i2c_pins_b: qupv3_se7_i2c_pins_b {
|
|
qupv3_se7_i2c_sda_b: qupv3_se7_i2c_sda_b {
|
|
mux {
|
|
pins = "gpio104";
|
|
function = "QUP0_L0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio104";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_i2c_scl_b: qupv3_se7_i2c_scl_b {
|
|
mux {
|
|
pins = "gpio105";
|
|
function = "QUP0_L1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio105";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_i2c_sleep_b: qupv3_se7_i2c_sleep_b {
|
|
mux {
|
|
pins = "gpio104", "gpio105";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio104", "gpio105";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se7_spi_pins_b: qupv3_se7_spi_pins_b {
|
|
qupv3_se7_spi_miso_b: qupv3_se7_spi_miso_b {
|
|
mux {
|
|
pins = "gpio104";
|
|
function = "QUP0_L0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio104";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_spi_mosi_b: qupv3_se7_spi_mosi_b {
|
|
mux {
|
|
pins = "gpio105";
|
|
function = "QUP0_L1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio105";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_spi_clk_b: qupv3_se7_spi_clk_b {
|
|
mux {
|
|
pins = "gpio101";
|
|
function = "QUP0_L2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio101";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_spi_cs_b: qupv3_se7_spi_cs_b {
|
|
mux {
|
|
pins = "gpio102";
|
|
function = "QUP0_L3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio102";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_spi_sleep_b: qupv3_se7_spi_sleep_b {
|
|
mux {
|
|
pins = "gpio104", "gpio105",
|
|
"gpio101", "gpio102";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio104", "gpio105",
|
|
"gpio101", "gpio102";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se5_4uart_pins: qupv3_se5_4uart_pins {
|
|
qupv3_se5_default_cts: qupv3_se5_default_cts {
|
|
mux {
|
|
pins = "gpio26";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio26";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_default_rts: qupv3_se5_default_rts {
|
|
mux {
|
|
pins = "gpio27";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio27";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_default_tx: qupv3_se5_default_tx {
|
|
mux {
|
|
pins = "gpio28";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio28";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_default_rx: qupv3_se5_default_rx {
|
|
mux {
|
|
pins = "gpio29";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio29";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_cts: qupv3_se5_cts {
|
|
mux {
|
|
pins = "gpio26";
|
|
function = "qup05";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio26";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_rts: qupv3_se5_rts {
|
|
mux {
|
|
pins = "gpio27";
|
|
function = "qup05";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio27";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_tx: qupv3_se5_tx {
|
|
mux {
|
|
pins = "gpio28";
|
|
function = "qup05";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio28";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_rx: qupv3_se5_rx {
|
|
mux {
|
|
pins = "gpio29";
|
|
function = "qup05";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio29";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
/* WSA speaker reset pin1 */
|
|
spkr_1_sd_n {
|
|
spkr_1_sd_n_sleep: spkr_1_sd_n_sleep {
|
|
mux {
|
|
pins = "gpio80";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio80";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down;
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
spkr_1_sd_n_active: spkr_1_sd_n_active {
|
|
mux {
|
|
pins = "gpio80";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio80";
|
|
drive-strength = <16>; /* 16 mA */
|
|
bias-disable;
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
cci0_suspend: cci0_suspend {
|
|
mux {
|
|
/* CLK, DATA*/
|
|
pins = "gpio38", "gpio37";
|
|
function = "cci_i2c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio38", "gpio37";
|
|
drive-strength = <2>; /* 2 MA */
|
|
bias-disable; /* No PULL */
|
|
};
|
|
};
|
|
|
|
cci0_active: cci0_active {
|
|
mux {
|
|
/* CLK, DATA*/
|
|
pins = "gpio38", "gpio37";
|
|
function = "cci_i2c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio38", "gpio37";
|
|
bias-pull-up; /* PULL UP*/
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cci1_suspend: cci1_suspend {
|
|
mux {
|
|
/* CLK, DATA*/
|
|
pins = "gpio40", "gpio39";
|
|
function = "cci_i2c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio40", "gpio39";
|
|
drive-strength = <2>; /* 2 MA */
|
|
bias-disable; /* No PULL */
|
|
};
|
|
};
|
|
|
|
cci1_active: cci1_active {
|
|
mux {
|
|
/* CLK, DATA*/
|
|
pins = "gpio40", "gpio39";
|
|
function = "cci_i2c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio40", "gpio39";
|
|
bias-pull-up; /* PULL UP*/
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_mclk0_active: cam_sensor_mclk0_active {
|
|
/* MCLK 0*/
|
|
mux {
|
|
pins = "gpio32";
|
|
function = "cam_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio32";
|
|
bias-disable; /* No PULL */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_mclk0_suspend: cam_sensor_mclk0_suspend {
|
|
/* MCLK 0*/
|
|
mux {
|
|
pins = "gpio32";
|
|
function = "cam_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio32";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_mclk1_active: cam_sensor_mclk1_active {
|
|
/* MCLK 1*/
|
|
mux {
|
|
pins = "gpio33";
|
|
function = "cam_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio33";
|
|
bias-disable; /* No PULL */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_mclk1_suspend: cam_sensor_mclk1_suspend {
|
|
/* MCLK 1*/
|
|
mux {
|
|
pins = "gpio33";
|
|
function = "cam_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio33";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_rear0_reset_active: cam_sensor_rear0_reset_active {
|
|
/* RESET0 */
|
|
mux {
|
|
pins = "gpio35";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio35";
|
|
bias-disable; /* No PULL */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_rear0_reset_suspend: cam_sensor_rear0_reset_suspend {
|
|
/* RESET0 */
|
|
mux {
|
|
pins = "gpio35";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio35";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
cam_sensor_front0_reset_active: cam_sensor_front0_reset_active {
|
|
/* RESET0 */
|
|
mux {
|
|
pins = "gpio36";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36";
|
|
bias-disable; /* No PULL */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_front0_reset_suspend: cam_sensor_front0_reset_suspend {
|
|
/* RESET0 */
|
|
mux {
|
|
pins = "gpio36";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
/* SDC pin type */
|
|
sdc1_on: sdc1_on {
|
|
clk {
|
|
pins = "sdc1_clk";
|
|
bias-disable;
|
|
drive-strength = <8>;
|
|
};
|
|
|
|
cmd {
|
|
pins = "sdc1_cmd";
|
|
bias-pull-up;
|
|
drive-strength = <8>;
|
|
};
|
|
|
|
data {
|
|
pins = "sdc1_data";
|
|
bias-pull-up;
|
|
drive-strength = <8>;
|
|
};
|
|
|
|
rclk {
|
|
pins = "sdc1_rclk";
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
sdc1_off: sdc1_off {
|
|
clk {
|
|
pins = "sdc1_clk";
|
|
bias-disable;
|
|
drive-strength = <2>;
|
|
};
|
|
|
|
cmd {
|
|
pins = "sdc1_cmd";
|
|
bias-pull-up;
|
|
drive-strength = <2>;
|
|
};
|
|
|
|
data {
|
|
pins = "sdc1_data";
|
|
bias-pull-up;
|
|
drive-strength = <2>;
|
|
};
|
|
|
|
rclk {
|
|
pins = "sdc1_rclk";
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
pmx_sdc3_clk {
|
|
sdc3_clk_on: sdc3_clk_on {
|
|
mux {
|
|
pins = "gpio79";
|
|
function = "sdc3_clk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio79";
|
|
drive-strength = <8>; /* 8 MA */
|
|
bias-disable; /* NO pull */
|
|
};
|
|
};
|
|
|
|
sdc3_clk_off: sdc3_clk_off {
|
|
mux {
|
|
pins = "gpio79";
|
|
function = "sdc3_clk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio79";
|
|
bias-disable; /* NO pull */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_sdc3_cmd {
|
|
sdc3_cmd_on: sdc3_cmd_on {
|
|
mux {
|
|
pins = "gpio78";
|
|
function = "sdc3_cmd";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio78";
|
|
bias-pull-up; /* pull up */
|
|
drive-strength = <8>; /* 8 MA */
|
|
};
|
|
};
|
|
|
|
sdc3_cmd_off: sdc3_cmd_off {
|
|
mux {
|
|
pins = "gpio78";
|
|
function = "sdc3_cmd";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio78";
|
|
bias-pull-up; /* pull up */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_sdc3_data {
|
|
sdc3_data_on: sdc3_data_on {
|
|
mux {
|
|
pins = "gpio74","gpio75","gpio76","gpio77";
|
|
function = "sdc3_data";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio74","gpio75","gpio76","gpio77";
|
|
bias-pull-up; /* pull up */
|
|
drive-strength = <8>; /* 8 MA */
|
|
};
|
|
};
|
|
|
|
sdc3_data_off: sdc3_data_off {
|
|
mux {
|
|
pins = "gpio74","gpio75","gpio76","gpio77";
|
|
function = "sdc3_data";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio74","gpio75","gpio76","gpio77";
|
|
bias-pull-up; /* pull up */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_int_active {
|
|
ts_int_active: ts_int_active {
|
|
mux {
|
|
pins = "gpio13";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio13";
|
|
drive-strength = <8>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_int_suspend {
|
|
ts_int_suspend: ts_int_suspend {
|
|
mux {
|
|
pins = "gpio13";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio13";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_reset_active {
|
|
ts_reset_active: ts_reset_active {
|
|
mux {
|
|
pins = "gpio12";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12";
|
|
drive-strength = <8>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_reset_suspend {
|
|
ts_reset_suspend: ts_reset_suspend {
|
|
mux {
|
|
pins = "gpio12";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_release {
|
|
ts_release: ts_release {
|
|
mux {
|
|
pins = "gpio13", "gpio12";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio13", "gpio12";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_sde_te {
|
|
sde_te_active: sde_te_active {
|
|
mux {
|
|
pins = "gpio73";
|
|
function = "mdp_vsync";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio73";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
sde_te_suspend: sde_te_suspend {
|
|
mux {
|
|
pins = "gpio73";
|
|
function = "mdp_vsync";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio73";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|