3f60a27d21
To access gpios from apps and adsp, we have added apps and remote flag in dtsi. To identify apps is busy or not, added qcom-apps flag during active state and added qcom-remote flag during suspend state, so other SS can use gpios during apps in suspend state. This flags in pinctrl file for respective GPIOs will help eGPIO to work for AON camera usecase. Also, increase TRE size from 64 to 1024 for camera usecase. Change-Id: Ibc65d9e61d55a3eaeffdf78aef3f8852687f576f Signed-off-by: Prasanna S <quic_prass@quicinc.com>
2119 lines
34 KiB
Plaintext
2119 lines
34 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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&tlmm {
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i2s0_sck {
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i2s0_sck_sleep: i2s0_sck_sleep {
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mux {
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pins = "gpio128";
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function = "gpio";
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};
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config {
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pins = "gpio128";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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i2s0_sck_active: i2s0_sck_active {
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mux {
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pins = "gpio128";
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function = "i2s0_sck";
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};
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config {
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pins = "gpio128";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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output-high;
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};
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};
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};
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i2s0_ws {
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i2s0_ws_sleep: i2s0_ws_sleep {
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mux {
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pins = "gpio129";
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function = "gpio";
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};
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config {
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pins = "gpio129";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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i2s0_ws_active: i2s0_ws_active {
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mux {
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pins = "gpio129";
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function = "i2s0_ws";
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};
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config {
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pins = "gpio129";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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output-high;
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};
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};
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};
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i2s0_sd0 {
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i2s0_sd0_sleep: i2s0_sd0_sleep {
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mux {
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pins = "gpio130";
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function = "gpio";
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};
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config {
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pins = "gpio130";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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i2s0_sd0_active: i2s0_sd0_active {
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mux {
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pins = "gpio130";
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function = "i2s0_data0";
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};
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config {
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pins = "gpio130";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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output-high;
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};
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};
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};
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i2s0_sd1 {
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i2s0_sd1_sleep: i2s0_sd1_sleep {
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mux {
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pins = "gpio131";
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function = "gpio";
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};
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config {
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pins = "gpio131";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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i2s0_sd1_active: i2s0_sd1_active {
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mux {
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pins = "gpio131";
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function = "i2s0_data1";
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};
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config {
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pins = "gpio131";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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output-high;
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};
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};
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};
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i2s1_sck {
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i2s1_sck_sleep: i2s1_sck_sleep {
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mux {
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pins = "gpio123";
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function = "gpio";
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};
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config {
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pins = "gpio123";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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i2s1_sck_active: i2s1_sck_active {
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mux {
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pins = "gpio123";
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function = "i2s1_sck";
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};
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config {
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pins = "gpio123";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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output-high;
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};
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};
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};
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i2s1_ws {
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i2s1_ws_sleep: i2s1_ws_sleep {
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mux {
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pins = "gpio125";
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function = "gpio";
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};
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config {
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pins = "gpio125";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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i2s1_ws_active: i2s1_ws_active {
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mux {
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pins = "gpio125";
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function = "i2s1_ws";
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};
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config {
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pins = "gpio125";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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output-high;
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};
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};
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};
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i2s1_sd0 {
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i2s1_sd0_sleep: i2s1_sd0_sleep {
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mux {
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pins = "gpio124";
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function = "gpio";
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};
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config {
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pins = "gpio124";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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i2s1_sd0_active: i2s1_sd0_active {
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mux {
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pins = "gpio124";
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function = "i2s1_data0";
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};
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config {
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pins = "gpio124";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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output-high;
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};
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};
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};
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i2s1_sd1 {
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i2s1_sd1_sleep: i2s1_sd1_sleep {
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mux {
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pins = "gpio126";
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function = "gpio";
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};
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config {
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pins = "gpio126";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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i2s1_sd1_active: i2s1_sd1_active {
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mux {
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pins = "gpio126";
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function = "i2s1_data1";
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};
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config {
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pins = "gpio126";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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output-high;
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};
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};
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};
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/* WCD reset pin */
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wcd_reset_active: wcd_reset_active {
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mux {
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pins = "gpio150";
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function = "gpio";
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};
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config {
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pins = "gpio150";
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drive-strength = <16>;
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output-high;
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};
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};
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wcd_reset_sleep: wcd_reset_sleep {
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mux {
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pins = "gpio150";
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function = "gpio";
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};
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config {
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pins = "gpio150";
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drive-strength = <16>;
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bias-disable;
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output-low;
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};
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};
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/* WSA speaker reset pins North Pins*/
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spkr_1_sd_n {
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spkr_1_sd_n_sleep: spkr_1_sd_n_sleep {
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mux {
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pins = "gpio119";
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function = "gpio";
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};
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config {
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pins = "gpio119";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down;
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input-enable;
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};
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};
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spkr_1_sd_n_active: spkr_1_sd_n_active {
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mux {
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pins = "gpio119";
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function = "gpio";
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};
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config {
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pins = "gpio119";
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drive-strength = <16>; /* 16 mA */
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bias-disable;
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output-high;
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};
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};
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};
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/* WSA speaker reset pins south Pins*/
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spkr_2_sd_n {
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spkr_2_sd_n_sleep: spkr_2_sd_n_sleep {
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mux {
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pins = "gpio183";
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function = "gpio";
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};
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config {
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pins = "gpio183";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down;
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input-enable;
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};
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};
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spkr_2_sd_n_active: spkr_2_sd_n_active {
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mux {
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pins = "gpio183";
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function = "gpio";
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};
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config {
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pins = "gpio183";
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drive-strength = <16>; /* 16 mA */
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bias-disable;
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output-high;
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};
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};
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};
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qupv3_se0_i2c_pins: qupv3_se0_i2c_pins {
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qupv3_se0_i2c_sda_active: qupv3_se0_i2c_sda_active {
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mux {
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pins = "gpio52";
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function = "qup1_se0_l0";
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};
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config {
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pins = "gpio52";
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drive-strength = <2>;
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bias-pull-up;
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qcom,i2c_pull;
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};
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};
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qupv3_se0_i2c_scl_active: qupv3_se0_i2c_scl_active {
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mux {
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pins = "gpio53";
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function = "qup1_se0_l1";
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};
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config {
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pins = "gpio53";
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drive-strength = <2>;
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bias-pull-up;
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qcom,i2c_pull;
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};
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};
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qupv3_se0_i2c_sleep: qupv3_se0_i2c_sleep {
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mux {
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pins = "gpio52", "gpio53";
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function = "gpio";
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};
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config {
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pins = "gpio52", "gpio53";
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drive-strength = <2>;
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};
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};
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};
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qupv3_se0_spi_pins: qupv3_se0_spi_pins {
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qupv3_se0_spi_miso_active: qupv3_se0_spi_miso_active {
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mux {
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pins = "gpio52";
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function = "qup1_se0_l0";
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};
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config {
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pins = "gpio52";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se0_spi_mosi_active: qupv3_se0_spi_mosi_active {
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mux {
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pins = "gpio53";
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function = "qup1_se0_l1";
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};
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config {
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pins = "gpio53";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se0_spi_clk_active: qupv3_se0_spi_clk_active {
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mux {
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pins = "gpio54";
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function = "qup1_se0_l2";
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};
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config {
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pins = "gpio54";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se0_spi_cs_active: qupv3_se0_spi_cs_active {
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mux {
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pins = "gpio55";
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function = "qup1_se0_l3";
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};
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config {
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pins = "gpio55";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se0_spi_sleep: qupv3_se0_spi_sleep {
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mux {
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pins = "gpio52", "gpio53",
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"gpio54", "gpio55";
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function = "gpio";
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};
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config {
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pins = "gpio52", "gpio53",
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"gpio54", "gpio55";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se1_i2c_pins: qupv3_se1_i2c_pins {
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qupv3_se1_i2c_sda_active: qupv3_se1_i2c_sda_active {
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mux {
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pins = "gpio4";
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function = "qup1_se1_l0";
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};
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config {
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pins = "gpio4";
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drive-strength = <2>;
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bias-pull-up;
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qcom,i2c_pull;
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};
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};
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qupv3_se1_i2c_scl_active: qupv3_se1_i2c_scl_active {
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mux {
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pins = "gpio5";
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function = "qup1_se1_l1";
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};
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config {
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pins = "gpio5";
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drive-strength = <2>;
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bias-pull-up;
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qcom,i2c_pull;
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};
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};
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qupv3_se1_i2c_sleep: qupv3_se1_i2c_sleep {
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mux {
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pins = "gpio4", "gpio5";
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function = "gpio";
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};
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config {
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pins = "gpio4", "gpio5";
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drive-strength = <2>;
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};
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};
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};
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qupv3_se1_spi_pins: qupv3_se1_spi_pins {
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qupv3_se1_spi_miso_active: qupv3_se1_spi_miso_active {
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mux {
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pins = "gpio4";
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function = "qup1_se1_l0";
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};
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config {
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pins = "gpio4";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se1_spi_mosi_active: qupv3_se1_spi_mosi_active {
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mux {
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pins = "gpio5";
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function = "qup1_se1_l1";
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};
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config {
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pins = "gpio5";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se1_spi_clk_active: qupv3_se1_spi_clk_active {
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mux {
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pins = "gpio6";
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function = "qup1_se1_l2";
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};
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config {
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pins = "gpio6";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se1_spi_cs_active: qupv3_se1_spi_cs_active {
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mux {
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pins = "gpio7";
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function = "qup1_se1_l3";
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};
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config {
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pins = "gpio7";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se1_spi_sleep: qupv3_se1_spi_sleep {
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mux {
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pins = "gpio4", "gpio5",
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"gpio6", "gpio7";
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function = "gpio";
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};
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config {
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pins = "gpio4", "gpio5",
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"gpio6", "gpio7";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se2_i2c_pins: qupv3_se2_i2c_pins {
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qupv3_se2_i2c_sda_active: qupv3_se2_i2c_sda_active {
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mux {
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pins = "gpio8";
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function = "qup1_se2_l0";
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};
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config {
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pins = "gpio8";
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drive-strength = <2>;
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bias-pull-up;
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qcom,i2c_pull;
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};
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};
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qupv3_se2_i2c_scl_active: qupv3_se2_i2c_scl_active {
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mux {
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pins = "gpio9";
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function = "qup1_se2_l1";
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};
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config {
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pins = "gpio9";
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drive-strength = <2>;
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bias-pull-up;
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qcom,i2c_pull;
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};
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};
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qupv3_se2_i2c_sleep: qupv3_se2_i2c_sleep {
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mux {
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pins = "gpio8", "gpio9";
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function = "gpio";
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};
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config {
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pins = "gpio8", "gpio9";
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drive-strength = <2>;
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};
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};
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};
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qupv3_se2_spi_pins: qupv3_se2_spi_pins {
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qupv3_se2_spi_miso_active: qupv3_se2_spi_miso_active {
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mux {
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pins = "gpio8";
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|
function = "qup1_se2_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio8";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se2_spi_mosi_active: qupv3_se2_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio9";
|
|
function = "qup1_se2_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio9";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se2_spi_clk_active: qupv3_se2_spi_clk_active {
|
|
mux {
|
|
pins = "gpio10";
|
|
function = "qup1_se2_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio10";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se2_spi_cs_active: qupv3_se2_spi_cs_active {
|
|
mux {
|
|
pins = "gpio11";
|
|
function = "qup1_se2_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio11";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se2_spi_sleep: qupv3_se2_spi_sleep {
|
|
mux {
|
|
pins = "gpio8", "gpio9",
|
|
"gpio10", "gpio11";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio8", "gpio9",
|
|
"gpio10", "gpio11";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se3_i2c_pins: qupv3_se3_i2c_pins {
|
|
qupv3_se3_i2c_sda_active: qupv3_se3_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio60";
|
|
function = "qup1_se3_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio60";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se3_i2c_scl_active: qupv3_se3_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio61";
|
|
function = "qup1_se3_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio61";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se3_i2c_sleep: qupv3_se3_i2c_sleep {
|
|
mux {
|
|
pins = "gpio60", "gpio61";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio60", "gpio61";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se4_i2c_pins: qupv3_se4_i2c_pins {
|
|
qupv3_se4_i2c_sda_active: qupv3_se4_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio16";
|
|
function = "qup1_se4_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio16";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_i2c_scl_active: qupv3_se4_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio17";
|
|
function = "qup1_se4_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio17";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_i2c_sleep: qupv3_se4_i2c_sleep {
|
|
mux {
|
|
pins = "gpio16", "gpio17";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio16", "gpio17";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_pins: qupv3_se4_spi_pins {
|
|
qupv3_se4_spi_miso_active: qupv3_se4_spi_miso_active {
|
|
mux {
|
|
pins = "gpio16";
|
|
function = "qup1_se4_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio16";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_mosi_active: qupv3_se4_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio17";
|
|
function = "qup1_se4_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio17";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_clk_active: qupv3_se4_spi_clk_active {
|
|
mux {
|
|
pins = "gpio18";
|
|
function = "qup1_se4_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio18";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_cs_active: qupv3_se4_spi_cs_active {
|
|
mux {
|
|
pins = "gpio19";
|
|
function = "qup1_se4_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio19";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_sleep: qupv3_se4_spi_sleep {
|
|
mux {
|
|
pins = "gpio16", "gpio17",
|
|
"gpio18", "gpio19";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio16", "gpio17",
|
|
"gpio18", "gpio19";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se5_i2c_pins: qupv3_se5_i2c_pins {
|
|
qupv3_se5_i2c_sda_active: qupv3_se5_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio12";
|
|
function = "qup1_se5_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_i2c_scl_active: qupv3_se5_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio13";
|
|
function = "qup1_se5_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio13";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_i2c_sleep: qupv3_se5_i2c_sleep {
|
|
mux {
|
|
pins = "gpio12", "gpio13";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12", "gpio13";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_pins: qupv3_se5_spi_pins {
|
|
qupv3_se5_spi_miso_active: qupv3_se5_spi_miso_active {
|
|
mux {
|
|
pins = "gpio12";
|
|
function = "qup1_se5_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_mosi_active: qupv3_se5_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio13";
|
|
function = "qup1_se5_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio13";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_clk_active: qupv3_se5_spi_clk_active {
|
|
mux {
|
|
pins = "gpio14";
|
|
function = "qup1_se5_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio14";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_cs_active: qupv3_se5_spi_cs_active {
|
|
mux {
|
|
pins = "gpio15";
|
|
function = "qup1_se5_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio15";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_sleep: qupv3_se5_spi_sleep {
|
|
mux {
|
|
pins = "gpio12", "gpio13",
|
|
"gpio14", "gpio15";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12", "gpio13",
|
|
"gpio14", "gpio15";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se6_i2c_pins: qupv3_se6_i2c_pins {
|
|
qupv3_se6_i2c_sda_active: qupv3_se6_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio24";
|
|
function = "qup1_se6_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio24";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_i2c_scl_active: qupv3_se6_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio25";
|
|
function = "qup1_se6_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio25";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_i2c_sleep: qupv3_se6_i2c_sleep {
|
|
mux {
|
|
pins = "gpio24", "gpio25";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio24", "gpio25";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_pins: qupv3_se6_spi_pins {
|
|
qupv3_se6_spi_miso_active: qupv3_se6_spi_miso_active {
|
|
mux {
|
|
pins = "gpio24";
|
|
function = "qup1_se6_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio24";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_mosi_active: qupv3_se6_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio25";
|
|
function = "qup1_se6_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio25";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_clk_active: qupv3_se6_spi_clk_active {
|
|
mux {
|
|
pins = "gpio26";
|
|
function = "qup1_se6_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio26";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_cs_active: qupv3_se6_spi_cs_active {
|
|
mux {
|
|
pins = "gpio27";
|
|
function = "qup1_se6_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio27";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_sleep: qupv3_se6_spi_sleep {
|
|
mux {
|
|
pins = "gpio24", "gpio25",
|
|
"gpio26", "gpio27";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio24", "gpio25",
|
|
"gpio26", "gpio27";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se7_2uart_pins: qupv3_se7_2uart_pins {
|
|
qupv3_se7_2uart_tx_active: qupv3_se7_2uart_tx_active {
|
|
mux {
|
|
pins = "gpio30";
|
|
function = "qup1_se7_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio30";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_2uart_rx_active: qupv3_se7_2uart_rx_active {
|
|
mux {
|
|
pins = "gpio31";
|
|
function = "qup1_se7_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio31";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_2uart_sleep: qupv3_se7_2uart_sleep {
|
|
mux {
|
|
pins = "gpio30", "gpio31";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio30", "gpio31";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se8_i2c_pins: qupv3_se8_i2c_pins {
|
|
qupv3_se8_i2c_sda_active: qupv3_se8_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio0";
|
|
function = "qup2_se0_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
qcom,apps;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_i2c_scl_active: qupv3_se8_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio1";
|
|
function = "qup2_se0_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio1";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
qcom,apps;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_i2c_sleep: qupv3_se8_i2c_sleep {
|
|
mux {
|
|
pins = "gpio0", "gpio1";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0", "gpio1";
|
|
drive-strength = <2>;
|
|
qcom,remote;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se8_spi_pins: qupv3_se8_spi_pins {
|
|
qupv3_se8_spi_miso_active: qupv3_se8_spi_miso_active {
|
|
mux {
|
|
pins = "gpio0";
|
|
function = "qup2_se0_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_spi_mosi_active: qupv3_se8_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio1";
|
|
function = "qup2_se0_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio1";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_spi_clk_active: qupv3_se8_spi_clk_active {
|
|
mux {
|
|
pins = "gpio2";
|
|
function = "qup2_se0_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio2";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_spi_cs_active: qupv3_se8_spi_cs_active {
|
|
mux {
|
|
pins = "gpio3";
|
|
function = "qup2_se0_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio3";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_spi_sleep: qupv3_se8_spi_sleep {
|
|
mux {
|
|
pins = "gpio0", "gpio1",
|
|
"gpio2", "gpio3";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0", "gpio1",
|
|
"gpio2", "gpio3";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se9_i2c_pins: qupv3_se9_i2c_pins {
|
|
qupv3_se9_i2c_sda_active: qupv3_se9_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio179";
|
|
function = "qup2_se1_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio179";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_i2c_scl_active: qupv3_se9_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio180";
|
|
function = "qup2_se1_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio180";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_i2c_sleep: qupv3_se9_i2c_sleep {
|
|
mux {
|
|
pins = "gpio179", "gpio180";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio179", "gpio180";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se10_i2c_pins: qupv3_se10_i2c_pins {
|
|
qupv3_se10_i2c_sda_active: qupv3_se10_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio56";
|
|
function = "qup2_se2_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio56";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se10_i2c_scl_active: qupv3_se10_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio57";
|
|
function = "qup2_se2_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio57";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se10_i2c_sleep: qupv3_se10_i2c_sleep {
|
|
mux {
|
|
pins = "gpio56", "gpio57";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio56", "gpio57";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se10_spi_pins: qupv3_se10_spi_pins {
|
|
qupv3_se10_spi_miso_active: qupv3_se10_spi_miso_active {
|
|
mux {
|
|
pins = "gpio56";
|
|
function = "qup2_se2_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio56";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se10_spi_mosi_active: qupv3_se10_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio57";
|
|
function = "qup2_se2_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio57";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se10_spi_clk_active: qupv3_se10_spi_clk_active {
|
|
mux {
|
|
pins = "gpio58";
|
|
function = "qup2_se2_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio58";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se10_spi_cs_active: qupv3_se10_spi_cs_active {
|
|
mux {
|
|
pins = "gpio59";
|
|
function = "qup2_se2_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio59";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se10_spi_sleep: qupv3_se10_spi_sleep {
|
|
mux {
|
|
pins = "gpio56", "gpio57",
|
|
"gpio58", "gpio59";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio56", "gpio57",
|
|
"gpio58", "gpio59";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se11_i2c_pins: qupv3_se11_i2c_pins {
|
|
qupv3_se11_i2c_sda_active: qupv3_se11_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio36";
|
|
function = "qup2_se3_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se11_i2c_scl_active: qupv3_se11_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio37";
|
|
function = "qup2_se3_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio37";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se11_i2c_sleep: qupv3_se11_i2c_sleep {
|
|
mux {
|
|
pins = "gpio36", "gpio37";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36", "gpio37";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se11_spi_pins: qupv3_se11_spi_pins {
|
|
qupv3_se11_spi_miso_active: qupv3_se11_spi_miso_active {
|
|
mux {
|
|
pins = "gpio36";
|
|
function = "qup2_se3_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se11_spi_mosi_active: qupv3_se11_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio37";
|
|
function = "qup2_se3_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio37";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se11_spi_clk_active: qupv3_se11_spi_clk_active {
|
|
mux {
|
|
pins = "gpio38";
|
|
function = "qup2_se3_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio38";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se11_spi_cs_active: qupv3_se11_spi_cs_active {
|
|
mux {
|
|
pins = "gpio39";
|
|
function = "qup2_se3_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio39";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se11_spi_sleep: qupv3_se11_spi_sleep {
|
|
mux {
|
|
pins = "gpio36", "gpio37",
|
|
"gpio38", "gpio39";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36", "gpio37",
|
|
"gpio38", "gpio39";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se12_i2c_pins: qupv3_se12_i2c_pins {
|
|
qupv3_se12_i2c_sda_active: qupv3_se12_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio32";
|
|
function = "qup2_se4_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio32";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se12_i2c_scl_active: qupv3_se12_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio33";
|
|
function = "qup2_se4_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio33";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se12_i2c_sleep: qupv3_se12_i2c_sleep {
|
|
mux {
|
|
pins = "gpio32", "gpio33";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio32", "gpio33";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se12_spi_pins: qupv3_se12_spi_pins {
|
|
qupv3_se12_spi_miso_active: qupv3_se12_spi_miso_active {
|
|
mux {
|
|
pins = "gpio32";
|
|
function = "qup2_se4_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio32";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se12_spi_mosi_active: qupv3_se12_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio33";
|
|
function = "qup2_se4_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio33";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se12_spi_clk_active: qupv3_se12_spi_clk_active {
|
|
mux {
|
|
pins = "gpio34";
|
|
function = "qup2_se4_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio34";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se12_spi_cs_active: qupv3_se12_spi_cs_active {
|
|
mux {
|
|
pins = "gpio35";
|
|
function = "qup2_se4_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio35";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se12_spi_sleep: qupv3_se12_spi_sleep {
|
|
mux {
|
|
pins = "gpio32", "gpio33",
|
|
"gpio34", "gpio35";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio32", "gpio33",
|
|
"gpio34", "gpio35";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se13_i2c_pins: qupv3_se13_i2c_pins {
|
|
qupv3_se13_i2c_sda_active: qupv3_se13_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio20";
|
|
function = "qup2_se5_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio20";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se13_i2c_scl_active: qupv3_se13_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio21";
|
|
function = "qup2_se5_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio21";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se13_i2c_sleep: qupv3_se13_i2c_sleep {
|
|
mux {
|
|
pins = "gpio20", "gpio21";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio20", "gpio21";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se13_spi_pins: qupv3_se13_spi_pins {
|
|
qupv3_se13_spi_miso_active: qupv3_se13_spi_miso_active {
|
|
mux {
|
|
pins = "gpio20";
|
|
function = "qup2_se5_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio20";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se13_spi_mosi_active: qupv3_se13_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio21";
|
|
function = "qup2_se5_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio21";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se13_spi_clk_active: qupv3_se13_spi_clk_active {
|
|
mux {
|
|
pins = "gpio22";
|
|
function = "qup2_se5_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio22";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se13_spi_cs_active: qupv3_se13_spi_cs_active {
|
|
mux {
|
|
pins = "gpio23";
|
|
function = "qup2_se5_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio23";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se13_spi_sleep: qupv3_se13_spi_sleep {
|
|
mux {
|
|
pins = "gpio20", "gpio21",
|
|
"gpio22", "gpio23";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio20", "gpio21",
|
|
"gpio22", "gpio23";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se14_4uart_pins: qupv3_se14_4uart_pins {
|
|
qupv3_se14_default_cts: qupv3_se14_default_cts {
|
|
mux {
|
|
pins = "gpio40";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio40";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se14_default_rts: qupv3_se14_default_rts {
|
|
mux {
|
|
pins = "gpio41";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio41";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se14_default_tx: qupv3_se14_default_tx {
|
|
mux {
|
|
pins = "gpio42";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio42";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se14_default_rx: qupv3_se14_default_rx {
|
|
mux {
|
|
pins = "gpio43";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio43";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se14_cts: qupv3_se14_cts {
|
|
mux {
|
|
pins = "gpio40";
|
|
function = "qup2_se6_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio40";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se14_rts: qupv3_se14_rts {
|
|
mux {
|
|
pins = "gpio41";
|
|
function = "qup2_se6_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio41";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se14_tx: qupv3_se14_tx {
|
|
mux {
|
|
pins = "gpio42";
|
|
function = "qup2_se6_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio42";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se14_rx_active: qupv3_se14_rx_active {
|
|
mux {
|
|
pins = "gpio43";
|
|
function = "qup2_se6_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio43";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
/* RX to be in gpio mode for sleep config */
|
|
qupv3_se14_rx_wake: qupv3_se14_rx_wake {
|
|
mux {
|
|
pins = "gpio43";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio43";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se15_i2c_pins: qupv3_se15_i2c_pins {
|
|
qupv3_se15_i2c_sda_active: qupv3_se15_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio44";
|
|
function = "qup2_se7_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio44";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se15_i2c_scl_active: qupv3_se15_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio45";
|
|
function = "qup2_se7_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio45";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se15_i2c_sleep: qupv3_se15_i2c_sleep {
|
|
mux {
|
|
pins = "gpio44", "gpio45";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio44", "gpio45";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se15_spi_pins: qupv3_se15_spi_pins {
|
|
qupv3_se15_spi_miso_active: qupv3_se15_spi_miso_active {
|
|
mux {
|
|
pins = "gpio44";
|
|
function = "qup2_se7_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio44";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se15_spi_mosi_active: qupv3_se15_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio45";
|
|
function = "qup2_se7_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio45";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se15_spi_clk_active: qupv3_se15_spi_clk_active {
|
|
mux {
|
|
pins = "gpio46";
|
|
function = "qup2_se7_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio46";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se15_spi_cs_active: qupv3_se15_spi_cs_active {
|
|
mux {
|
|
pins = "gpio47";
|
|
function = "qup2_se7_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio47";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se15_spi_sleep: qupv3_se15_spi_sleep {
|
|
mux {
|
|
pins = "gpio44", "gpio45",
|
|
"gpio46", "gpio47";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio44", "gpio45",
|
|
"gpio46", "gpio47";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
sdc2_on: sdc2_on {
|
|
clk {
|
|
pins = "gpio62";
|
|
function = "SDC2_CLK";
|
|
bias-disable;
|
|
drive-strength = <16>;
|
|
};
|
|
|
|
cmd {
|
|
pins = "gpio51";
|
|
function = "SDC2_CMD";
|
|
bias-pull-up;
|
|
drive-strength = <10>;
|
|
};
|
|
|
|
data {
|
|
pins = "gpio63", "gpio120", "gpio48", "gpio49";
|
|
function = "SDC2_DATA";
|
|
bias-pull-up;
|
|
drive-strength = <10>;
|
|
};
|
|
|
|
sd-cd {
|
|
pins = "gpio39";
|
|
bias-pull-up;
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
|
|
sdc2_off: sdc2_off {
|
|
clk {
|
|
pins = "gpio62";
|
|
function = "gpio";
|
|
bias-disable;
|
|
drive-strength = <2>;
|
|
};
|
|
|
|
cmd {
|
|
pins = "gpio51";
|
|
function = "gpio";
|
|
bias-pull-up;
|
|
drive-strength = <2>;
|
|
};
|
|
|
|
data {
|
|
pins = "gpio63", "gpio120", "gpio48", "gpio49";
|
|
function = "gpio";
|
|
bias-pull-up;
|
|
drive-strength = <2>;
|
|
};
|
|
|
|
sd-cd {
|
|
pins = "gpio39";
|
|
bias-pull-up;
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
usb_phy_ps: usb_phy_ps {
|
|
usb3phy_portselect_default: usb3phy_portselect_default {
|
|
mux {
|
|
pins = "gpio122";
|
|
function = "usb0_phy_ps";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio122";
|
|
bias-pull-down;
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
|
|
usb3phy_portselect_gpio: usb3phy_portselect_gpio {
|
|
mux {
|
|
pins = "gpio122";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio122";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
input-enable;
|
|
};
|
|
};
|
|
};
|
|
/* touchscreen pins */
|
|
pmx_ts_active {
|
|
ts_active: ts_active {
|
|
mux {
|
|
pins = "gpio189", "gpio176";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio189", "gpio176";
|
|
drive-strength = <8>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_reset_suspend {
|
|
ts_reset_suspend: ts_reset_suspend {
|
|
mux {
|
|
pins = "gpio189";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio189";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_int_suspend {
|
|
ts_int_suspend: ts_int_suspend {
|
|
mux {
|
|
pins = "gpio176";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio176";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_release {
|
|
ts_release: ts_release {
|
|
mux {
|
|
pins = "gpio189", "gpio176";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio189", "gpio176";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
pcie0 {
|
|
pcie0_perst_default: pcie0_perst_default {
|
|
mux {
|
|
pins = "gpio33";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio33";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
pcie0_clkreq_default: pcie0_clkreq_default {
|
|
mux {
|
|
pins = "gpio118";
|
|
function = "pcie0_clk_req_n";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio118";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
pcie0_wake_default: pcie0_wake_default {
|
|
mux {
|
|
pins = "gpio81";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio81";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
pcie0_clkreq_sleep: pcie0_clkreq_sleep {
|
|
mux {
|
|
pins = "gpio118";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio118";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
input-enable;
|
|
};
|
|
};
|
|
};
|
|
};
|