android_kernel_samsung_sm8750-devicetrees/qcom/ravelin-rumi.dtsi

// SPDX-License-Identifier: BSD-3-Clause
/*
 * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
 */

#include <dt-bindings/clock/qcom,sm4450-gcc.h>
#include <dt-bindings/gpio/gpio.h>

&soc {
	timer {
		clock-frequency = <500000>;
	};

	timer@17420000 {
		clock-frequency = <500000>;
	};

	qcom,wdt@17410000 {
		status = "disabled";
	};

	usb_emuphy: phy@a784000 {
		compatible = "qcom,usb-emu-phy";
		reg = <0x0a784000 0x9500>;

		qcom,emu-init-seq = <0xfffff 0x4
			0xffff0 0x4
			0x100000 0x20
			0x0 0x20
			0x000001A0 0x20
			0x00100000 0x3c
			0x0 0x3c
			0x0 0x4>;
		};

	bi_tcxo: bi_tcxo {
		compatible = "fixed-factor-clock";
		clock-mult = <1>;
		clock-div = <4>;
		clocks = <&xo_board>;
		#clock-cells = <0>;
	};

	bi_tcxo_ao: bi_tcxo_ao {
		compatible = "fixed-factor-clock";
		clock-mult = <1>;
		clock-div = <4>;
		clocks = <&xo_board>;
		#clock-cells = <0>;
	};
};

&SILVER_CPU_OFF {
	status = "nok";
};

&SILVER_CPU_RAIL_OFF {
	status = "nok";
};

&GOLD_CPU_OFF {
	status = "nok";
};

&GOLD_CPU_RAIL_OFF {
	status = "nok";
};

&CLUSTER_OFF {
	status = "nok";
};

&CX_RET {
	status = "nok";
};

&disp_rsc {
	status = "nok";
};

&usb0 {
	dwc3@a600000 {
		usb-phy = <&usb_emuphy>, <&usb_nop_phy>;
		dr_mode = "peripheral";
		maximum-speed = "high-speed";
	};


};

&qupv3_se7_2uart {
	qcom,rumi_platform;
};

&ufsphy_mem {
	compatible = "qcom,ufs-phy-qrbtc-sdm845";

	vdda-phy-supply = <&L5B>;
	vdda-pll-supply = <&L16B>;
	vdda-phy-max-microamp = <85710>;
	vdda-pll-max-microamp = <18330>;

	status = "ok";
};

&ufshc_mem {
	limit-tx-hs-gear = <1>;
	limit-rx-hs-gear = <1>;
	limit-rate = <2>; /* HS Rate-B */

	vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
	vdd-hba-fixed-regulator;

	vcc-supply = <&L24B>;
	vcc-max-microamp = <1056000>;

	vccq-supply = <&L13B>;
	vccq-max-microamp = <750000>;

	vccq2-supply = <&L19B>;
	vccq2-max-microamp = <750000>;

	qcom,vddp-ref-clk-supply = <&L13B>;
	qcom,vddp-ref-clk-max-microamp = <70>;

	qcom,disable-lpm;
	rpm-level = <0>;
	spm-level = <0>;

	status = "ok";
};

&sdhc_1 {
	status = "ok";
	vdd-supply = <&L5E>;
	qcom,vdd-voltage-level = <2960000 2960000>;
	qcom,vdd-current-level = <0 570000>;

	vdd-io-supply = <&L19B>;
	qcom,vdd-io-always-on;
	qcom,vdd-io-lpm-sup;
	qcom,vdd-io-voltage-level = <1800000 1800000>;
	qcom,vdd-io-current-level = <0 325000>;

	/delete-property/ mmc-ddr-1_8v;
	/delete-property/ mmc-hs200-1_8v;
	/delete-property/ mmc-hs400-1_8v;
	/delete-property/ mmc-hs400-enhanced-strobe;
	max-frequency = <100000000>;

	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&sdc1_on>;
	pinctrl-1 = <&sdc1_off>;
};

&sdhc_2 {
	status = "ok";
	vdd-supply = <&L24B>;
	qcom,vdd-current-level = <0 800000>;

	vdd-io-supply = <&L28B>;
	qcom,vdd-io-voltage-level = <2960000 2960000>;
	qcom,vdd-io-current-level = <0 22000>;

	is_rumi;

	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&sdc2_on>;
	pinctrl-1 = <&sdc2_off>;

	cd-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>;
};

&gcc {
	clocks = <&bi_tcxo>, <&sleep_clk>,
		<&pcie_0_pipe_clk>, <&ufs_phy_rx_symbol_0_clk>,
		<&ufs_phy_rx_symbol_1_clk>, <&ufs_phy_tx_symbol_0_clk>,
		<&usb3_phy_wrapper_gcc_usb30_pipe_clk>;
};

&camcc {
	clocks = <&bi_tcxo>,
		<&gcc GCC_CAMERA_AHB_CLK>;
};

&dispcc {
	clocks = <&bi_tcxo>, <&bi_tcxo_ao>,
		<&sleep_clk>, <&gcc GCC_DISP_AHB_CLK>;
};

&gpucc {
	clocks = <&bi_tcxo>,
		<&gcc GCC_GPU_GPLL0_CLK_SRC>,
		<&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>,
		<&gcc GCC_GPU_SNOC_DVM_GFX_CLK>;
};

&debugcc {
	clocks = <&bi_tcxo>,
		<&gcc 0>, <&camcc 0>,
		<&dispcc 0>, <&gpucc 0>;
};

&rpmhcc {
	compatible = "qcom,dummycc";
	clock-output-names = "rpmhcc_clocks";
};

&cpufreq_hw {
	clocks = <&bi_tcxo>, <&gcc GCC_GPLL0>;
};

&tsens0 {
	status = "disabled";
};

&tsens1 {
	status = "disabled";
};

&pcie0 {
	reg = <0x01c00000 0x3000>,
		<0x01c06000 0x2000>,
		<0x60000000 0xf1d>,
		<0x60000f20 0xa8>,
		<0x60001000 0x1000>,
		<0x60100000 0x100000>,
		<0x01c05000 0x1000>;
		reg-names = "parf", "phy", "dm_core", "elbi", "iatu", "conf",
			"rumi";
		qcom,target-link-speed = <0x1>;
		qcom,link-check-max-count = <200>; /* 1 sec */
		qcom,no-l1-supported;
		qcom,no-l1ss-supported;
		qcom,no-aux-clk-sync;

		status = "ok";
};

&pcie0_msi {
	status = "ok";
};