6f18ce8026
Add snapshot of device tree bindings from keystone common kernel, branch
"android-mainline-keystone-qcom-release" at c4c12103f9c0 ("Snap for 9228065
from e32903b9a63bb558df8b803b076619c53c16baad to
android-mainline-keystone-qcom-release").
Change-Id: I7682079615cbd9f29340a5c1f2a1d84ec441a1f1
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
147 lines
5.0 KiB
YAML
147 lines
5.0 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright 2020 Linaro Ltd.
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/thermal/thermal-idle.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Thermal idle cooling device binding
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maintainers:
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- Daniel Lezcano <daniel.lezcano@linaro.org>
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description: |
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The thermal idle cooling device allows the system to passively
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mitigate the temperature on the device by injecting idle cycles,
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forcing it to cool down.
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This binding describes the thermal idle node.
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properties:
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$nodename:
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const: thermal-idle
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description: |
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A thermal-idle node describes the idle cooling device properties to
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cool down efficiently the attached thermal zone.
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'#cooling-cells':
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const: 2
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description: |
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Must be 2, in order to specify minimum and maximum cooling state used in
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the cooling-maps reference. The first cell is the minimum cooling state
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and the second cell is the maximum cooling state requested.
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duration-us:
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description: |
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The idle duration in microsecond the device should cool down.
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exit-latency-us:
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description: |
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The exit latency constraint in microsecond for the injected idle state
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for the device. It is the latency constraint to apply when selecting an
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idle state from among all the present ones.
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required:
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- '#cooling-cells'
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/thermal/thermal.h>
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// Example: Combining idle cooling device on big CPUs with cpufreq cooling device
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cpus {
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#address-cells = <2>;
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#size-cells = <0>;
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/* ... */
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cpu_b0: cpu@100 {
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device_type = "cpu";
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compatible = "arm,cortex-a72";
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reg = <0x0 0x100>;
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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dynamic-power-coefficient = <436>;
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#cooling-cells = <2>; /* min followed by max */
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cpu-idle-states = <&CPU_SLEEP>, <&CLUSTER_SLEEP>;
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thermal-idle {
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#cooling-cells = <2>;
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duration-us = <10000>;
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exit-latency-us = <500>;
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};
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};
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cpu_b1: cpu@101 {
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device_type = "cpu";
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compatible = "arm,cortex-a72";
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reg = <0x0 0x101>;
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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dynamic-power-coefficient = <436>;
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#cooling-cells = <2>; /* min followed by max */
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cpu-idle-states = <&CPU_SLEEP>, <&CLUSTER_SLEEP>;
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thermal-idle {
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#cooling-cells = <2>;
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duration-us = <10000>;
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exit-latency-us = <500>;
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};
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};
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/* ... */
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};
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/* ... */
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thermal_zones {
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cpu_thermal: cpu {
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polling-delay-passive = <100>;
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polling-delay = <1000>;
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/* ... */
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trips {
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cpu_alert0: cpu_alert0 {
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temperature = <65000>;
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hysteresis = <2000>;
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type = "passive";
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};
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cpu_alert1: cpu_alert1 {
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temperature = <70000>;
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hysteresis = <2000>;
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type = "passive";
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};
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cpu_alert2: cpu_alert2 {
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temperature = <75000>;
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hysteresis = <2000>;
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type = "passive";
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};
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cpu_crit: cpu_crit {
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temperature = <95000>;
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hysteresis = <2000>;
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type = "critical";
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};
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};
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cooling-maps {
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map0 {
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trip = <&cpu_alert1>;
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cooling-device = <&{/cpus/cpu@100/thermal-idle} 0 15 >,
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<&{/cpus/cpu@101/thermal-idle} 0 15>;
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};
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map1 {
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trip = <&cpu_alert2>;
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cooling-device =
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<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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};
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};
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};
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};
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