6f18ce8026
Add snapshot of device tree bindings from keystone common kernel, branch
"android-mainline-keystone-qcom-release" at c4c12103f9c0 ("Snap for 9228065
from e32903b9a63bb558df8b803b076619c53c16baad to
android-mainline-keystone-qcom-release").
Change-Id: I7682079615cbd9f29340a5c1f2a1d84ec441a1f1
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
48 lines
1.4 KiB
Plaintext
48 lines
1.4 KiB
Plaintext
* Pin-controller driver for the Marvell Berlin SoCs
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Pin control registers are part of both chip controller and system
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controller register sets. Pin controller nodes should be a sub-node of
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either the chip controller or system controller node. The pins
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controlled are organized in groups, so no actual pin information is
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needed.
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A pin-controller node should contain subnodes representing the pin group
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configurations, one per function. Each subnode has the group name and
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the muxing function used.
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Be aware the Marvell Berlin datasheets use the keyword 'mode' for what
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is called a 'function' in the pin-controller subsystem.
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Required properties:
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- compatible: should be one of:
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"marvell,berlin2-soc-pinctrl",
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"marvell,berlin2-system-pinctrl",
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"marvell,berlin2cd-soc-pinctrl",
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"marvell,berlin2cd-system-pinctrl",
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"marvell,berlin2q-soc-pinctrl",
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"marvell,berlin2q-system-pinctrl",
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"marvell,berlin4ct-avio-pinctrl",
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"marvell,berlin4ct-soc-pinctrl",
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"marvell,berlin4ct-system-pinctrl",
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"syna,as370-soc-pinctrl"
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Required subnode-properties:
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- groups: a list of strings describing the group names.
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- function: a string describing the function used to mux the groups.
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Example:
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sys_pinctrl: pin-controller {
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compatible = "marvell,berlin2q-system-pinctrl";
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uart0_pmux: uart0-pmux {
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groups = "GSM12";
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function = "uart0";
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};
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};
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&uart0 {
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pinctrl-0 = <&uart0_pmux>;
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pinctrl-names = "default";
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};
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