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android_kernel_samsung_sm87…/bindings/phy/marvell,armada-cp110-utmi-phy.yaml
Melody Olvera 6f18ce8026 dt-bindings: Add devicetree bindings
Add snapshot of device tree bindings from keystone common kernel, branch
"android-mainline-keystone-qcom-release" at c4c12103f9c0 ("Snap for 9228065
from e32903b9a63bb558df8b803b076619c53c16baad to
android-mainline-keystone-qcom-release").

Change-Id: I7682079615cbd9f29340a5c1f2a1d84ec441a1f1
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
2023-04-03 15:40:37 -07:00

110 lines
2.4 KiB
YAML

# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/phy/marvell,armada-cp110-utmi-phy.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Marvell Armada CP110/CP115 UTMI PHY
maintainers:
- Konstantin Porotchkin <kostap@marvell.com>
description:
On Armada 7k/8k and CN913x, there are two host and one device USB controllers.
Each of two exiting UTMI PHYs could be connected to either USB host or USB device
controller.
The USB device controller can only be connected to a single UTMI PHY port
0.H----- USB HOST0
UTMI PHY0 --------/
0.D-----0
\------ USB DEVICE
1.D-----1
UTMI PHY1 --------\
1.H----- USB HOST1
properties:
compatible:
const: marvell,cp110-utmi-phy
reg:
maxItems: 1
"#address-cells":
const: 1
"#size-cells":
const: 0
marvell,system-controller:
description:
Phandle to the system controller node
$ref: /schemas/types.yaml#/definitions/phandle
#Required child nodes:
patternProperties:
"^usb-phy@[0|1]$":
type: object
description:
Each UTMI PHY port must be represented as a sub-node.
properties:
reg:
description: phy port index.
maxItems: 1
"#phy-cells":
const: 0
required:
- reg
- "#phy-cells"
additionalProperties: false
required:
- compatible
- reg
- "#address-cells"
- "#size-cells"
- marvell,system-controller
additionalProperties: false
examples:
- |
cp0_utmi: utmi@580000 {
compatible = "marvell,cp110-utmi-phy";
reg = <0x580000 0x2000>;
marvell,system-controller = <&cp0_syscon0>;
#address-cells = <1>;
#size-cells = <0>;
cp0_utmi0: usb-phy@0 {
reg = <0>;
#phy-cells = <0>;
};
cp0_utmi1: usb-phy@1 {
reg = <1>;
#phy-cells = <0>;
};
};
cp0_usb3_0 {
usb-phy = <&cp0_usb3_0_phy0>;
phys = <&cp0_utmi0>;
phy-names = "utmi";
/* UTMI0 is connected to USB host controller (default mode) */
dr_mode = "host";
};
cp0_usb3_1 {
usb-phy = <&cp0_usb3_0_phy1>;
phys = <&cp0_utmi1>;
phy-names = "utmi";
/* UTMI1 is connected to USB device controller */
dr_mode = "peripheral";
};