6f18ce8026
Add snapshot of device tree bindings from keystone common kernel, branch
"android-mainline-keystone-qcom-release" at c4c12103f9c0 ("Snap for 9228065
from e32903b9a63bb558df8b803b076619c53c16baad to
android-mainline-keystone-qcom-release").
Change-Id: I7682079615cbd9f29340a5c1f2a1d84ec441a1f1
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
42 lines
961 B
Plaintext
42 lines
961 B
Plaintext
Broadcom Stingray PCIe PHY
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Required properties:
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- compatible: must be "brcm,sr-pcie-phy"
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- reg: base address and length of the PCIe SS register space
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- brcm,sr-cdru: phandle to the CDRU syscon node
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- brcm,sr-mhb: phandle to the MHB syscon node
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- #phy-cells: Must be 1, denotes the PHY index
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For PAXB based root complex, one can have a configuration of up to 8 PHYs
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PHY index goes from 0 to 7
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For the internal PAXC based root complex, PHY index is always 8
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Example:
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mhb: syscon@60401000 {
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compatible = "brcm,sr-mhb", "syscon";
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reg = <0 0x60401000 0 0x38c>;
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};
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cdru: syscon@6641d000 {
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compatible = "brcm,sr-cdru", "syscon";
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reg = <0 0x6641d000 0 0x400>;
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};
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pcie_phy: phy@40000000 {
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compatible = "brcm,sr-pcie-phy";
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reg = <0 0x40000000 0 0x800>;
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brcm,sr-cdru = <&cdru>;
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brcm,sr-mhb = <&mhb>;
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#phy-cells = <1>;
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};
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/* users of the PCIe PHY */
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pcie0: pcie@48000000 {
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...
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...
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phys = <&pcie_phy 0>;
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phy-names = "pcie-phy";
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};
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