6f18ce8026
Add snapshot of device tree bindings from keystone common kernel, branch
"android-mainline-keystone-qcom-release" at c4c12103f9c0 ("Snap for 9228065
from e32903b9a63bb558df8b803b076619c53c16baad to
android-mainline-keystone-qcom-release").
Change-Id: I7682079615cbd9f29340a5c1f2a1d84ec441a1f1
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
73 lines
1.5 KiB
YAML
73 lines
1.5 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/gpio/mediatek,mt7621-gpio.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Mediatek MT7621 SoC GPIO controller
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maintainers:
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- Sergio Paracuellos <sergio.paracuellos@gmail.com>
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description: |
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The IP core used inside these SoCs has 3 banks of 32 GPIOs each.
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The registers of all the banks are interwoven inside one single IO range.
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We load one GPIO controller instance per bank. Also the GPIO controller can receive
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interrupts on any of the GPIOs, either edge or level. It then interrupts the CPU
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using GIC INT12.
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properties:
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$nodename:
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pattern: "^gpio@[0-9a-f]+$"
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compatible:
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const: mediatek,mt7621-gpio
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reg:
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maxItems: 1
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"#gpio-cells":
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const: 2
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gpio-controller: true
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gpio-ranges: true
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interrupt-controller: true
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"#interrupt-cells":
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const: 2
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interrupts:
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maxItems: 1
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required:
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- compatible
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- reg
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- "#gpio-cells"
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- gpio-controller
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- gpio-ranges
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- interrupt-controller
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- "#interrupt-cells"
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- interrupts
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/mips-gic.h>
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gpio@600 {
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compatible = "mediatek,mt7621-gpio";
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reg = <0x600 0x100>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 0 95>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SHARED 12 IRQ_TYPE_LEVEL_HIGH>;
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};
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...
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