6f18ce8026
Add snapshot of device tree bindings from keystone common kernel, branch
"android-mainline-keystone-qcom-release" at c4c12103f9c0 ("Snap for 9228065
from e32903b9a63bb558df8b803b076619c53c16baad to
android-mainline-keystone-qcom-release").
Change-Id: I7682079615cbd9f29340a5c1f2a1d84ec441a1f1
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
45 lines
1.6 KiB
Plaintext
45 lines
1.6 KiB
Plaintext
Marvell Cryptographic Engines And Security Accelerator
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Required properties:
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- compatible: should be one of the following string
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"marvell,orion-crypto"
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"marvell,kirkwood-crypto"
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"marvell,dove-crypto"
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"marvell,armada-370-crypto"
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"marvell,armada-xp-crypto"
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"marvell,armada-375-crypto"
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"marvell,armada-38x-crypto"
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- reg: base physical address of the engine and length of memory mapped
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region. Can also contain an entry for the SRAM attached to the CESA,
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but this representation is deprecated and marvell,crypto-srams should
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be used instead
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- reg-names: "regs". Can contain an "sram" entry, but this representation
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is deprecated and marvell,crypto-srams should be used instead
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- interrupts: interrupt number
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- clocks: reference to the crypto engines clocks. This property is not
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required for orion and kirkwood platforms
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- clock-names: "cesaX" and "cesazX", X should be replaced by the crypto engine
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id.
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This property is not required for the orion and kirkwoord
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platforms.
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"cesazX" clocks are not required on armada-370 platforms
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- marvell,crypto-srams: phandle to crypto SRAM definitions
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Optional properties:
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- marvell,crypto-sram-size: SRAM size reserved for crypto operations, if not
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specified the whole SRAM is used (2KB)
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Examples:
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crypto@90000 {
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compatible = "marvell,armada-xp-crypto";
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reg = <0x90000 0x10000>;
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reg-names = "regs";
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interrupts = <48>, <49>;
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clocks = <&gateclk 23>, <&gateclk 23>;
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clock-names = "cesa0", "cesa1";
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marvell,crypto-srams = <&crypto_sram0>, <&crypto_sram1>;
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marvell,crypto-sram-size = <0x600>;
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};
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