6f18ce8026
Add snapshot of device tree bindings from keystone common kernel, branch
"android-mainline-keystone-qcom-release" at c4c12103f9c0 ("Snap for 9228065
from e32903b9a63bb558df8b803b076619c53c16baad to
android-mainline-keystone-qcom-release").
Change-Id: I7682079615cbd9f29340a5c1f2a1d84ec441a1f1
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
63 lines
1.3 KiB
YAML
63 lines
1.3 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/rockchip,rv1126-cru.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Rockchip RV1126 Clock and Reset Unit
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maintainers:
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- Jagan Teki <jagan@edgeble.ai>
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- Finley Xiao <finley.xiao@rock-chips.com>
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- Heiko Stuebner <heiko@sntech.de>
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description:
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The RV1126 clock controller generates the clock and also implements a
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reset controller for SoC peripherals.
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properties:
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compatible:
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enum:
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- rockchip,rv1126-cru
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- rockchip,rv1126-pmucru
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reg:
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maxItems: 1
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"#clock-cells":
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const: 1
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"#reset-cells":
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const: 1
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clocks:
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maxItems: 1
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clock-names:
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const: xin24m
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rockchip,grf:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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Phandle to the syscon managing the "general register files" (GRF),
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if missing pll rates are not changeable, due to the missing pll
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lock status.
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required:
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- compatible
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- reg
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- "#clock-cells"
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- "#reset-cells"
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additionalProperties: false
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examples:
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- |
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cru: clock-controller@ff490000 {
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compatible = "rockchip,rv1126-cru";
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reg = <0xff490000 0x1000>;
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rockchip,grf = <&grf>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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