40aa1b3eb7
Add GCC and TCSRCC clock bindings on kera platform. Change-Id: I29f71b82ea76855a068ce26682037ae6095255e5 Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
49 lines
1013 B
YAML
49 lines
1013 B
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,tcsrcc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Technologies, Inc. Top-Level CSR Clock & Reset Controller
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maintainers:
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- Xubin Bai <quic_xubibai@quicinc.com>
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description: |
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Top-Level CSR Clock & Reset Controller Binding
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See also:
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- dt-bindings/clock/qcom,tcsrcc-pineapple.h
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- dt-bindings/clock/qcom,tcsrcc-sun.h
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properties:
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compatible:
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enum:
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- qcom,pineapple-tcsrcc
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- qcom,sun-tcsrcc
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- qcom,tuna-tcsrcc
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- qcom,kera-tcsrcc
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required:
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- compatible
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- reg
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- reg-name
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allOf:
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- $ref: "qcom,gcc.yaml#"
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,rpmh.h>
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tcsrcc: clock-controller@1f40000 {
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compatible = "qcom,pineapple-tcsrcc", "syscon";
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reg = <0x1f40000 0xc0000>;
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reg-name = "cc_base";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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...
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