1d07bacb66
Add GCC, DEBUGCC and RPMHCC dt-bindings for sdxbaagha platform. Change-Id: I7aec3f5160d57c30637325042d3ade770815d21c Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
61 lines
1.4 KiB
YAML
61 lines
1.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,sdxbaagha-gcc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Technologies, Inc. Global Clock & Reset Controller
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maintainers:
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- Taniya Das <quic_tdas@quicinc.com>
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description: |
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Global clock control module which supports the clocks, resets and
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power domains on sdxbaagha
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See also:
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- dt-bindings/clock/qcom,gcc-sdxbaagha.h
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properties:
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compatible:
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const: qcom,sdxbaagha-gcc
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clocks:
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items:
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- description: Board XO source
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- description: Board active XO source
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- description: PCIE Pipe clock source
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- description: Sleep clock source
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clock-names:
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items:
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- const: bi_tcxo
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- const: bi_tcxo_ao
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- const: pcie_pipe_clk
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- const: sleep_clk
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required:
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- compatible
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- clocks
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- clock-names
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allOf:
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- $ref: qcom,gcc.yaml#
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,rpmh.h>
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clock-controller@80000 {
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compatible = "qcom,sdxbaagha-gcc";
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reg = <0x80000 0x1f4200>;
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clocks = <&rpmhcc RPMH_CXO_CLK>,<&rpmhcc RPMH_CXO_CLK_A>,
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<&pcie_pipe_clk>,<&sleep_clk>;
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clock-names = "bi_tcxo","bi_tcxo_ao",
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"pcie_pipe_clk","sleep_clk";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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...
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