6f18ce8026
Add snapshot of device tree bindings from keystone common kernel, branch
"android-mainline-keystone-qcom-release" at c4c12103f9c0 ("Snap for 9228065
from e32903b9a63bb558df8b803b076619c53c16baad to
android-mainline-keystone-qcom-release").
Change-Id: I7682079615cbd9f29340a5c1f2a1d84ec441a1f1
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
40 lines
1.1 KiB
Plaintext
40 lines
1.1 KiB
Plaintext
Microchip PIC32 Clock Controller Binding
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----------------------------------------
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Microchip clock controller is consists of few oscillators, PLL, multiplexer
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and few divider modules.
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This binding uses common clock bindings.
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[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
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Required properties:
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- compatible: shall be "microchip,pic32mzda-clk".
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- reg: shall contain base address and length of clock registers.
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- #clock-cells: shall be 1.
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Optional properties:
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- microchip,pic32mzda-sosc: shall be added only if platform has
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secondary oscillator connected.
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Example:
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rootclk: clock-controller@1f801200 {
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compatible = "microchip,pic32mzda-clk";
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reg = <0x1f801200 0x200>;
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#clock-cells = <1>;
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/* optional */
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microchip,pic32mzda-sosc;
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};
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The clock consumer shall specify the desired clock-output of the clock
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controller (as defined in [2]) by specifying output-id in its "clock"
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phandle cell.
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[2] include/dt-bindings/clock/microchip,pic32-clock.h
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For example for UART2:
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uart2: serial@2 {
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compatible = "microchip,pic32mzda-uart";
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reg = <>;
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interrupts = <>;
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clocks = <&rootclk PB2CLK>;
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};
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