6f18ce8026
Add snapshot of device tree bindings from keystone common kernel, branch
"android-mainline-keystone-qcom-release" at c4c12103f9c0 ("Snap for 9228065
from e32903b9a63bb558df8b803b076619c53c16baad to
android-mainline-keystone-qcom-release").
Change-Id: I7682079615cbd9f29340a5c1f2a1d84ec441a1f1
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
22 lines
743 B
Plaintext
22 lines
743 B
Plaintext
* Marvell PXA910 Clock Controller
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The PXA910 clock subsystem generates and supplies clock to various
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controllers within the PXA910 SoC.
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Required Properties:
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- compatible: should be one of the following.
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- "marvell,pxa910-clock" - controller compatible with PXA910 SoC.
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- reg: physical base address of the clock subsystem and length of memory mapped
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region. There are 4 places in SOC has clock control logic:
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"mpmu", "apmu", "apbc", "apbcp". So four reg spaces need to be defined.
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- #clock-cells: should be 1.
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- #reset-cells: should be 1.
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Each clock is assigned an identifier and client nodes use this identifier
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to specify the clock which they consume.
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All these identifier could be found in <dt-bindings/clock/marvell-pxa910.h>.
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