6f18ce8026
Add snapshot of device tree bindings from keystone common kernel, branch
"android-mainline-keystone-qcom-release" at c4c12103f9c0 ("Snap for 9228065
from e32903b9a63bb558df8b803b076619c53c16baad to
android-mainline-keystone-qcom-release").
Change-Id: I7682079615cbd9f29340a5c1f2a1d84ec441a1f1
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
60 lines
1.2 KiB
YAML
60 lines
1.2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/hisilicon,hi3559av100-clock.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Hisilicon SOC Clock for HI3559AV100
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maintainers:
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- Dongjiu Geng <gengdongjiu@huawei.com>
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description: |
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Hisilicon SOC clock control module which supports the clocks, resets and
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power domains on HI3559AV100.
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See also:
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dt-bindings/clock/hi3559av100-clock.h
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properties:
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compatible:
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enum:
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- hisilicon,hi3559av100-clock
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- hisilicon,hi3559av100-shub-clock
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reg:
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minItems: 1
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maxItems: 2
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'#clock-cells':
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const: 1
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'#reset-cells':
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const: 2
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description: |
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First cell is reset request register offset.
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Second cell is bit offset in reset request register.
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required:
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- compatible
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- reg
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- '#clock-cells'
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- '#reset-cells'
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additionalProperties: false
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examples:
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- |
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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clock-controller@12010000 {
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compatible = "hisilicon,hi3559av100-clock";
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#clock-cells = <1>;
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#reset-cells = <2>;
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reg = <0x0 0x12010000 0x0 0x10000>;
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};
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};
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...
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