6f18ce8026
Add snapshot of device tree bindings from keystone common kernel, branch
"android-mainline-keystone-qcom-release" at c4c12103f9c0 ("Snap for 9228065
from e32903b9a63bb558df8b803b076619c53c16baad to
android-mainline-keystone-qcom-release").
Change-Id: I7682079615cbd9f29340a5c1f2a1d84ec441a1f1
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
48 lines
1.3 KiB
Plaintext
48 lines
1.3 KiB
Plaintext
* Hisilicon Hi3660 Clock Controller
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The Hi3660 clock controller generates and supplies clock to various
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controllers within the Hi3660 SoC.
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Required Properties:
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- compatible: the compatible should be one of the following strings to
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indicate the clock controller functionality.
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- "hisilicon,hi3660-crgctrl"
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- "hisilicon,hi3660-pctrl"
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- "hisilicon,hi3660-pmuctrl"
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- "hisilicon,hi3660-sctrl"
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- "hisilicon,hi3660-iomcu"
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- "hisilicon,hi3660-stub-clk"
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- reg: physical base address of the controller and length of memory mapped
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region.
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- #clock-cells: should be 1.
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Optional Properties:
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- mboxes: Phandle to the mailbox for sending message to MCU.
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(See: ../mailbox/hisilicon,hi3660-mailbox.txt for more info)
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Each clock is assigned an identifier and client nodes use this identifier
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to specify the clock which they consume.
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All these identifier could be found in <dt-bindings/clock/hi3660-clock.h>.
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Examples:
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crg_ctrl: clock-controller@fff35000 {
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compatible = "hisilicon,hi3660-crgctrl", "syscon";
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reg = <0x0 0xfff35000 0x0 0x1000>;
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#clock-cells = <1>;
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};
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uart0: serial@fdf02000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x0 0xfdf02000 0x0 0x1000>;
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interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&crg_ctrl HI3660_CLK_MUX_UART0>,
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<&crg_ctrl HI3660_PCLK>;
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clock-names = "uartclk", "apb_pclk";
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};
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