6f18ce8026
Add snapshot of device tree bindings from keystone common kernel, branch
"android-mainline-keystone-qcom-release" at c4c12103f9c0 ("Snap for 9228065
from e32903b9a63bb558df8b803b076619c53c16baad to
android-mainline-keystone-qcom-release").
Change-Id: I7682079615cbd9f29340a5c1f2a1d84ec441a1f1
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
59 lines
1.8 KiB
Plaintext
59 lines
1.8 KiB
Plaintext
Device Tree Clock bindings for arch-at91
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This binding uses the common clock binding[1].
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[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
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Slow Clock controller:
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Required properties:
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- compatible : shall be one of the following:
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"atmel,at91sam9x5-sckc",
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"atmel,sama5d3-sckc",
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"atmel,sama5d4-sckc" or
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"microchip,sam9x60-sckc":
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at91 SCKC (Slow Clock Controller)
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- #clock-cells : shall be 1 for "microchip,sam9x60-sckc" otherwise shall be 0.
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- clocks : shall be the input parent clock phandle for the clock.
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Optional properties:
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- atmel,osc-bypass : boolean property. Set this when a clock signal is directly
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provided on XIN.
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For example:
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sckc@fffffe50 {
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compatible = "atmel,at91sam9x5-sckc";
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reg = <0xfffffe50 0x4>;
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clocks = <&slow_xtal>;
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#clock-cells = <0>;
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};
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Power Management Controller (PMC):
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Required properties:
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- compatible : shall be "atmel,<chip>-pmc", "syscon" or
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"microchip,sam9x60-pmc"
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<chip> can be: at91rm9200, at91sam9260, at91sam9261,
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at91sam9263, at91sam9g45, at91sam9n12, at91sam9rl, at91sam9g15,
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at91sam9g25, at91sam9g35, at91sam9x25, at91sam9x35, at91sam9x5,
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sama5d2, sama5d3 or sama5d4.
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- #clock-cells : from common clock binding; shall be set to 2. The first entry
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is the type of the clock (core, system, peripheral or generated) and the
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second entry its index as provided by the datasheet
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- clocks : Must contain an entry for each entry in clock-names.
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- clock-names: Must include the following entries: "slow_clk", "main_xtal"
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Optional properties:
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- atmel,osc-bypass : boolean property. Set this when a clock signal is directly
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provided on XIN.
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For example:
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pmc: pmc@f0018000 {
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compatible = "atmel,sama5d4-pmc", "syscon";
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reg = <0xf0018000 0x120>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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#clock-cells = <2>;
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clocks = <&clk32k>, <&main_xtal>;
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clock-names = "slow_clk", "main_xtal";
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};
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