6f18ce8026
Add snapshot of device tree bindings from keystone common kernel, branch
"android-mainline-keystone-qcom-release" at c4c12103f9c0 ("Snap for 9228065
from e32903b9a63bb558df8b803b076619c53c16baad to
android-mainline-keystone-qcom-release").
Change-Id: I7682079615cbd9f29340a5c1f2a1d84ec441a1f1
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
36 lines
1.2 KiB
Plaintext
36 lines
1.2 KiB
Plaintext
STMicroelectronics STi SATA controller
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This binding describes a SATA device.
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Required properties:
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- compatible : Must be "st,ahci"
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- reg : Physical base addresses and length of register sets
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- interrupts : Interrupt associated with the SATA device
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- interrupt-names : Associated name must be; "hostc"
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- clocks : The phandle for the clock
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- clock-names : Associated name must be; "ahci_clk"
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- phys : The phandle for the PHY port
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- phy-names : Associated name must be; "ahci_phy"
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Optional properties:
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- resets : The power-down, soft-reset and power-reset lines of SATA IP
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- reset-names : Associated names must be; "pwr-dwn", "sw-rst" and "pwr-rst"
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Example:
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/* Example for stih407 family silicon */
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sata0: sata@9b20000 {
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compatible = "st,ahci";
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reg = <0x9b20000 0x1000>;
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interrupts = <GIC_SPI 159 IRQ_TYPE_NONE>;
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interrupt-names = "hostc";
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phys = <&phy_port0 PHY_TYPE_SATA>;
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phy-names = "ahci_phy";
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resets = <&powerdown STIH407_SATA0_POWERDOWN>,
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<&softreset STIH407_SATA0_SOFTRESET>,
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<&softreset STIH407_SATA0_PWR_SOFTRESET>;
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reset-names = "pwr-dwn", "sw-rst", "pwr-rst";
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clocks = <&clk_s_c0_flexgen CLK_ICN_REG>;
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clock-names = "ahci_clk";
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};
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