// SPDX-License-Identifier: BSD-3-Clause /* * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include #include &soc { qcom,smp2p-wpss { smp2p_wlan_1_in: qcom,smp2p-wlan-1-in { qcom,entry-name = "wlan"; interrupt-controller; #interrupt-cells = <2>; }; smp2p_wlan_1_out: qcom,smp2p-wlan-1-out { qcom,entry-name = "wlan"; #qcom,smem-state-cells = <1>; }; smp2p_wlan_2_in: qcom,smp2p-wlan-2-in { qcom,entry-name = "wlan_soc_wake"; interrupt-controller; #interrupt-cells = <2>; }; smp2p_wlan_2_out: qcom,smp2p-wlan-2-out { qcom,entry-name = "wlan_soc_wake"; #qcom,smem-state-cells = <1>; }; smp2p_wlan_3_out: qcom,smp2p-wlan-3-out { qcom,entry-name = "wlan_ep_power_save"; #qcom,smem-state-cells = <1>; }; }; wpss_pas: remoteproc-wpss@97000000 { firmware-name = "wcn7750/wpss.mdt"; }; icnss2: qcom,wcn7750 { compatible = "qcom,wcn7750"; reg = <0x17110040 0x0>, <0xc0000000 0x10000>; reg-names = "msi_addr", "smmu_iova_ipa"; qcom,rproc-handle = <&wpss_pas>; iommus = <&apps_smmu 0x1480 0x1>; wlan-en-gpio = <35>; host-sol-gpio = <33>; dev-sol-gpio = <32>; wlan-sw-ctrl-gpio = <81>; interrupts = , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , ; qcom,iommu-dma = "fastmap"; qcom,iommu-faults = "stall-disable", "HUPCF", "non-fatal"; qcom,iommu-dma-addr-pool = <0xb0000000 0x10000000>; qcom,iommu-geometry = <0xb0000000 0x10010000>; dma-coherent; qcom,fw-prefix; qcom,wlan; tsens = "sys-therm-3"; qcom,wlan-msa-fixed-region = <&wlan_msa_mem>; vdd-cx-mx-supply = <&S3B>; qcom,vdd-cx-mx-config = <880000 2736000 0 0 0>; vdd-1.8-xo-supply = <&S1B>; qcom,vdd-1.8-xo-config = <1856000 2044000 0 0 0>; vdd-1.3-rfa-supply = <&S2B>; qcom,vdd-1.3-rfa-config = <1256000 2092000 0 0 0>; vdd-1.8-io-supply = <&L11B>; qcom,vdd-1.8-io-config = <1800000 1800000 0 0 0>; qcom,smem-states = <&smp2p_wlan_1_out 0>, <&smp2p_wlan_2_out 0>, <&smp2p_wlan_3_out 0>; qcom,smem-state-names = "wlan-smp2p-out", "wlan-soc-wake-smp2p-out", "wlan-ep-powersave-smp2p-out"; qcom,pdc_init_table = " {class: wlan_pdc, ss: rf, res: s3b.v, dwnval: 696}", " {class: wlan_pdc, ss: rf, res: s1b.v, upval: 1864}", " {class: wlan_pdc, ss: rf, res: s2b.v, upval: 1316}", " {class: wlan_pdc, ss: rf, res: s4b.e, enable: 0}", " {class: wlan_pdc, ss: rf, res: l4k.m, enable: 1}"; qcom,qmp = <&aoss_qmp>; qcom,vreg_ol_cpr ="s3b"; interconnects = <&pcie_noc MASTER_PCIE_0 &pcie_noc SLAVE_ANOC_PCIE_GEM_NOC>, <&gem_noc MASTER_ANOC_PCIE_GEM_NOC &mc_virt SLAVE_EBI1>; interconnect-names = "pcie_to_memnoc", "memnoc_to_ddr"; qcom,icc-path-count = <2>; qcom,bus-bw-cfg-count = <9>; qcom,bus-bw-cfg = /** ICC Path 1 **/ <0 0>, /* no vote */ /* idle: 0-18 Mbps snoc/anoc: 100 Mhz */ <2250 1200000>, /* low: 18-60 Mbps snoc/anoc: 100 Mhz */ <7500 1200000>, /* medium: 60-240 Mbps snoc/anoc: 100 Mhz */ <30000 1200000>, /* high: 240-1200 Mbps snoc/anoc: 100 Mhz */ <100000 1200000>, /* very high: > 1200 Mbps snoc/anoc: 403 Mhz */ <175000 3224000>, /* ultra high: DBS mode snoc/anoc: 403 Mhz */ <312500 3224000>, /* super high: DBS mode snoc/anoc: 533 Mhz */ <587500 4264000>, /* low (latency critical): 18-60 Mbps snoc/anoc: 200 Mhz */ <7500 1600000>, /** ICC Path 2 **/ <0 0>, /* idle: 0-18 Mbps ddr: 451.2 MHz */ <2250 2188800>, /* low: 18-60 Mbps ddr: 451.2 MHz */ <7500 2188800>, /* medium: 60-240 Mbps ddr: 451.2 MHz */ <30000 2188800>, /* high: 240-1200 Mbps ddr: 451.2 MHz */ <100000 2188800>, /* very high: > 1200 Mbps ddr: 1555 MHz */ <175000 6220800>, /* ultra high: DBS mode ddr: 2092 MHz */ <312500 8368000>, /* super high: DBS mode ddr: 3.2 GHz */ <587500 12800000>, /* low (latency critical): 18-60 Mbps ddr: 451.2 MHz */ <7500 2188800>; icnss_cdev_apss: qcom,icnss_cdev1 { #cooling-cells = <2>; }; icnss_cdev_wpss: qcom,icnss_cdev2 { #cooling-cells = <2>; }; qcom,smp2p_map_wlan_1_in { interrupts-extended = <&smp2p_wlan_1_in 0 0>, <&smp2p_wlan_1_in 1 0>; interrupt-names = "qcom,smp2p-force-fatal-error", "qcom,smp2p-early-crash-ind"; }; qcom,smp2p_map_wlan_2_in { interrupts-extended = <&smp2p_wlan_2_in 0 0>; interrupt-names = "qcom,smp2p-soc-wake-ack"; }; }; };