Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
SPDX-License-Identifier: BSD-3-Clause
#include <dt-bindings/ipclite-signals.h>

&soc {
	#address-cells = <1>;
	#size-cells = <1>;
	interrupt-parent = <&intc>;

	ipcc_compute_l0: qcom,ipcc_compute_l0@443000 {
		compatible = "qcom,ipcc";
		reg = <0x443000 0x1000>;
		interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-controller;
		#interrupt-cells = <3>;
		#mbox-cells = <2>;
	};
	ipclite {
		compatible = "qcom,ipclite";
		memory-region = <&global_sync_mem>;
		hwlocks = <&tcsr_mutex 11>;
		#address-cells = <1>;
		#size-cells = <1>;
		major_version = <1>;
		minor_version = <0>;
		feature_mask_low = <0x0003>;
		feature_mask_high = <0x0000>;
		ranges;

		ipclite_apss: apss {
			qcom,remote-pid = <0>;
			label = "apss";

			ipclite_signal_0 {
				index = <0>;
				mboxes = <&ipcc_compute_l0 IPCC_CLIENT_APSS
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MSG>;
					interrupt-parent = <&ipcc_compute_l0>;
				interrupts = <IPCC_CLIENT_APSS
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MSG
					IRQ_TYPE_EDGE_RISING>;
			};

			ipclite_signal_1 {
				index = <1>;
				mboxes = <&ipcc_compute_l0 IPCC_CLIENT_BROADCAST
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MEM_INIT>;
				interrupt-parent = <&ipcc_compute_l0>;
				interrupts = <IPCC_CLIENT_BROADCAST
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MEM_INIT
					IRQ_TYPE_EDGE_RISING>;
			};

			ipclite_signal_2 {
				index = <2>;
				mboxes = <&ipcc_compute_l0 IPCC_CLIENT_APSS
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_VERSION>;
				interrupt-parent = <&ipcc_compute_l0>;
				interrupts = <IPCC_CLIENT_APSS
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_VERSION
					IRQ_TYPE_EDGE_RISING>;
			};

			ipclite_signal_3 {
				index = <3>;
				mboxes = <&ipcc_compute_l0 IPCC_CLIENT_APSS
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_TEST>;
				interrupt-parent = <&ipcc_compute_l0>;
				interrupts = <IPCC_CLIENT_APSS
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_TEST
					IRQ_TYPE_EDGE_RISING>;
			};

			ipclite_signal_4 {
				index = <4>;
				mboxes = <&ipcc_compute_l0 IPCC_CLIENT_APSS
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_SSR>;
				interrupt-parent = <&ipcc_compute_l0>;
				interrupts = <IPCC_CLIENT_APSS
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_SSR
					IRQ_TYPE_EDGE_RISING>;
			};

			ipclite_signal_5 {
				index = <5>;
				mboxes = <&ipcc_compute_l0 IPCC_CLIENT_APSS
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_DEBUG>;
				interrupt-parent = <&ipcc_compute_l0>;
				interrupts = <IPCC_CLIENT_APSS
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_DEBUG
					IRQ_TYPE_EDGE_RISING>;
			};
		};

		ipclite_cdsp: cdsp {
			qcom,remote-pid = <5>;
			label = "cdsp";

			ipclite_signal_0 {
				index = <0>;
				mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MSG>;
				interrupt-parent = <&ipcc_compute_l0>;
				interrupts = <IPCC_CLIENT_CDSP
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MSG
					IRQ_TYPE_EDGE_RISING>;
			};

			ipclite_signal_1 {
				index = <1>;
				mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MEM_INIT>;
				interrupt-parent = <&ipcc_compute_l0>;
				interrupts = <IPCC_CLIENT_CDSP
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MEM_INIT
					IRQ_TYPE_EDGE_RISING>;
			};

			ipclite_signal_2 {
				index = <2>;
				mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_VERSION>;
				interrupt-parent = <&ipcc_compute_l0>;
				interrupts = <IPCC_CLIENT_CDSP
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_VERSION
					IRQ_TYPE_EDGE_RISING>;
			};

			ipclite_signal_3 {
				index = <3>;
				mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_TEST>;
				interrupt-parent = <&ipcc_compute_l0>;
				interrupts = <IPCC_CLIENT_CDSP
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_TEST
					IRQ_TYPE_EDGE_RISING>;
			};

			ipclite_signal_4 {
				index = <4>;
				mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_SSR>;
				interrupt-parent = <&ipcc_compute_l0>;
				interrupts = <IPCC_CLIENT_CDSP
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_SSR
					IRQ_TYPE_EDGE_RISING>;
			};

			ipclite_signal_5 {
				index = <5>;
				mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_DEBUG>;
				interrupt-parent = <&ipcc_compute_l0>;
				interrupts = <IPCC_CLIENT_CDSP
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_DEBUG
					IRQ_TYPE_EDGE_RISING>;
			};
		};

		ipclite_cvp: cvp {
			qcom,remote-pid = <6>;
			label = "cvp";

			ipclite_signal_0 {
				index = <0>;
				mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MSG>;
				interrupt-parent = <&ipcc_compute_l0>;
				interrupts = <IPCC_CLIENT_CVP
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MSG
					IRQ_TYPE_EDGE_RISING>;
			};

			ipclite_signal_1 {
				index = <1>;
				mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MEM_INIT>;
				interrupt-parent = <&ipcc_compute_l0>;
				interrupts = <IPCC_CLIENT_CVP
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MEM_INIT
					IRQ_TYPE_EDGE_RISING>;
			};

			ipclite_signal_2 {
				index = <2>;
				mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_VERSION>;
				interrupt-parent = <&ipcc_compute_l0>;
				interrupts = <IPCC_CLIENT_CVP
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_VERSION
					IRQ_TYPE_EDGE_RISING>;
			};

			ipclite_signal_3 {
				index = <3>;
				mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_TEST>;
				interrupt-parent = <&ipcc_compute_l0>;
				interrupts = <IPCC_CLIENT_CVP
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_TEST
					IRQ_TYPE_EDGE_RISING>;
			};

			ipclite_signal_4 {
				index = <4>;
				mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_SSR>;
				interrupt-parent = <&ipcc_compute_l0>;
				interrupts = <IPCC_CLIENT_CVP
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_SSR
					IRQ_TYPE_EDGE_RISING>;
			};

			ipclite_signal_5 {
				index = <5>;
				mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_DEBUG>;
				interrupt-parent = <&ipcc_compute_l0>;
				interrupts = <IPCC_CLIENT_CVP
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_DEBUG
					IRQ_TYPE_EDGE_RISING>;
			};
		};

		ipclite_cam: cam {
			qcom,remote-pid = <7>;
			label = "cam";

			ipclite_signal_0 {
				index = <0>;
				mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MSG>;
				interrupt-parent = <&ipcc_compute_l0>;
				interrupts = <IPCC_CLIENT_CAM
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MSG
					IRQ_TYPE_EDGE_RISING>;
			};

			ipclite_signal_1 {
				index = <1>;
				mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MEM_INIT>;
				interrupt-parent = <&ipcc_compute_l0>;
				interrupts = <IPCC_CLIENT_CAM
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MEM_INIT
					IRQ_TYPE_EDGE_RISING>;
			};

			ipclite_signal_2 {
				index = <2>;
				mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_VERSION>;
				interrupt-parent = <&ipcc_compute_l0>;
				interrupts = <IPCC_CLIENT_CAM
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_VERSION
					IRQ_TYPE_EDGE_RISING>;
			};

			ipclite_signal_3 {
				index = <3>;
				mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_TEST>;
				interrupt-parent = <&ipcc_compute_l0>;
				interrupts = <IPCC_CLIENT_CAM
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_TEST
					IRQ_TYPE_EDGE_RISING>;
			};

			ipclite_signal_4 {
				index = <4>;
				mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_SSR>;
				interrupt-parent = <&ipcc_compute_l0>;
				interrupts = <IPCC_CLIENT_CAM
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_SSR
					IRQ_TYPE_EDGE_RISING>;
			};

			ipclite_signal_5 {
				index = <5>;
				mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_DEBUG>;
				interrupt-parent = <&ipcc_compute_l0>;
				interrupts = <IPCC_CLIENT_CAM
					IPCC_COMPUTE_L0_SIGNAL_IPCLITE_DEBUG
					IRQ_TYPE_EDGE_RISING>;
			};
		};
	};

};