// SPDX-License-Identifier: BSD-3-Clause

/*
 * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
 */

#include <dt-bindings/interconnect/qcom,sun.h>
#include <dt-bindings/clock/qcom,rpmh.h>

&pm8550ve_f_gpios {
	bt_en: bt_en {
		pins = "gpio3";
		function = "normal";
		input-disable;
		output-enable;
		bias-disable;
		power-source = <1>;
	};
	bt_fmd_clk_en: bt_fmd_clk_en {
		pins = "gpio6";
		function = "normal";
		input-enable;
		output-disable;
		bias-disable;
		power-source = <1>;
	};
};

&tlmm {
	cnss_bt_sw_ctrl: cnss_wlan_sw_ctrl {
		mux {
			pins = "gpio18";
			function = "wcn_sw_ctrl";
		};
	};
};

&soc {
	bluetooth: wcn786x {
			compatible = "qcom,wcn786x";
			nvmem-cells = <&fmd_set>, <&fmd_chg_pon>, <&fmd_cnt2_stop>;
			nvmem-cell-names = "fmd_set", "fmd_chg_pon", "fmd_cnt2_stop";
			clocks = <&rpmhcc RPMH_RF_CLK1>;
			clock-names = "bt_rf_clk1";
			qcom,wcn786x;
			pinctrl-names = "bt_en", "sw_ctrl", "bt_fmd_clk_en";
			pinctrl-0 = <&bt_en>;
			pinctrl-1 = <&cnss_bt_sw_ctrl>;
			pinctrl-2 = <&bt_fmd_clk_en>;
			/* List of GPIOs to be setup for interrupt wakeup capable*/
			mpm_wake_set_gpios = <18 9>;
			qcom,wl-reset-gpio = <&tlmm 16 0>; /* WL_EN */
			qcom,bt-sw-ctrl-gpio = <&tlmm 18 0>; /* SW_CTRL */
			qcom,bt-fmd-clk-gpio = <&pm8550ve_f_gpios 6 0>; /* FMD_CLK_CTRL */
			qcom,bt-reset-gpio = <&pm8550ve_f_gpios 3 0>; /* BT_EN */
			qcom,qmp = <&aoss_qmp>;

			qcom,bt-vdd18-aon-supply  = <&L3F>;   /* VDD1P8_AON */
			qcom,bt-vdd12-io-supply   = <&L2F>;   /* VDD1P2_IO */
			qcom,bt-ant-ldo-supply    = <&L6K>;   /* AV91C_VDD Extractor */
			/* This buck is added for HW WAR */
			qcom,bt-vdd-dig-supply    = <&S4D>;   /* BT CX_MX LDO */
			qcom,bt-vdd-aon-supply    = <&S5F>;   /* RFA_CMN/AON */
			qcom,bt-vdd-rfa0p75-supply = <&S5F>;  /* RFA_OP75 */
			qcom,bt-vdd-rfa1p8-supply  = <&S3G>;  /* RFA_1P8 */
			qcom,bt-vdd-rfa1p25-supply = <&S7I>; /* RFA_1P2 */

			qcom,bt-vdd18-aon-config  = <1800000 1800000 30000 1 1>;
			qcom,bt-vdd12-io-config   = <1200000 1200000 30000 1 1>;
			qcom,bt-ant-ldo-config    = <1800000 1860000 0 1 0>;
			qcom,bt-vdd-aon-config    = <876000 1000000 0 1 1>;
			qcom,bt-vdd-dig-config    = <560000 1036000 0 1 0>;
			qcom,bt-vdd-rfa0p75-config = <876000 1000000 0 1 0>;
			qcom,bt-vdd-rfa1p8-config = <1860000 2000000 0 1 0>;
			qcom,bt-vdd-rfa1p25-config  = <1312000 1340000 0 1 0>;

                        /* WLAN regulator for FMD operation, and to be used only in GNG/BRH 2.0 */
			qcom,bt-vdd-wlan-aon-supply = <&S4D>;
			qcom,bt-vdd-wlan-aon-config = <876000 1036000 0 0 1>;

			qcom,pdc_init_table =
				"{class: wlan_pdc, ss: rf, res: s5f.m, enable: 1}",
				"{class: wlan_pdc, ss: rf, res: s5f.v, enable: 1}",
				"{class: wlan_pdc, ss: rf, res: s5f.v, upval: 876}",
				"{class: wlan_pdc, ss: rf, res: s5f.v, dwnval: 876}";
	};
};

&swr4 {
	btswr_slave: btswr-slave {
		compatible = "qcom,btfmswr_slave";
		reg = <0x02 0x08170220>;
	};
};

// FM changes
&qupv3_se5_i2c {
    status = "ok";
	nq@64 {
		compatible = "rtc6226";
		reg = <0x64>;
		fmint-gpio = <&tlmm 84 0>;
		vdd-supply = <&L16B>;
		rtc6226,vdd-supply-voltage = <2800000 2800000>;
		rtc6226,vdd-load = <15000>;
		vio-supply = <&L15B>;
		rtc6226,vio-supply-voltage = <1800000 1800000>;
	};
};

//uart instance
&qupv3_se14_4uart {
	status = "ok";
};