// SPDX-License-Identifier: BSD-3-Clause
/*
 * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
 */
&glink_edge {
	qcom,fastrpc {
		compatible = "qcom,fastrpc";
		qcom,glink-channels = "fastrpcglink-apps-dsp";
		qcom,intents = <0x64 64>;
		label = "adsp";
		memory-region = <&adsp_mem_heap>;
		qcom,vmids = <22 37>;


		compute-cb@1 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <3>;
			label = "adsprpc-smd";
			iommus = <&apps_smmu 0x1803 0x0>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			dma-coherent;
			pd-type = <1>;
		};

		compute-cb@2 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <4>;
			label = "adsprpc-smd";
			iommus = <&apps_smmu 0x1804 0x0>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			dma-coherent;
                        pd-type = <2>;
		};
		compute-cb@3 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <5>;
			label = "adsprpc-smd";
			iommus = <&apps_smmu 0x1805 0x0>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			dma-coherent;
                        qcom,nsessions = <5>;
			pd-type = <3>;
		};
	};
};

&remoteproc_cdsp_glink {
	qcom,fastrpc {
		compatible = "qcom,fastrpc";
		qcom,glink-channels = "fastrpcglink-apps-dsp";
		qcom,intents = <0x64 64>;
		label = "cdsp";
		qcom,fastrpc-gids = <2908>;
		qcom,rpc-latency-us = <235>;

                qcom,qos-cores = <0 1 2 3>;

		compute-cb@1 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <1>;
			label = "cdsprpc-smd";
			iommus = <&apps_smmu 0x1401 0x0400>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			dma-coherent;

			pd-type = <1>;
		};

		compute-cb@2 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <2>;
			label = "cdsprpc-smd";
			iommus = <&apps_smmu 0x1402 0x0400>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			dma-coherent;

			qcom,iova-max-align-shift = <9>;
			pd-type = <7>;
		};

		compute-cb@3 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <3>;
			label = "cdsprpc-smd";
			iommus = <&apps_smmu 0x1403 0x0400>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			dma-coherent;

			qcom,iova-max-align-shift = <9>;
			pd-type = <7>;
		};

		compute-cb@4 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <4>;
			label = "cdsprpc-smd";
			iommus = <&apps_smmu 0x1404 0x0400>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			dma-coherent;

			qcom,iova-max-align-shift = <9>;
			pd-type = <7>;
		};

		compute-cb@5 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <5>;
			label = "cdsprpc-smd";
			iommus = <&apps_smmu 0x1405 0x0400>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			dma-coherent;

			qcom,iova-max-align-shift = <9>;
			pd-type = <7>;
		};

		compute-cb@6 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <6>;
			label = "cdsprpc-smd";
			iommus = <&apps_smmu 0x1406 0x0400>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			dma-coherent;

			qcom,iova-max-align-shift = <9>;
			pd-type = <7>;
		};

		compute-cb@7 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <7>;
			label = "cdsprpc-smd";
			iommus = <&apps_smmu 0x1407 0x0400>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			dma-coherent;

			qcom,iova-max-align-shift = <9>;
			pd-type = <7>;
		};

		compute-cb@8 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <8>;
			label = "cdsprpc-smd";
			iommus = <&apps_smmu 0x1408 0x0400>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			dma-coherent;

			qcom,iova-max-align-shift = <9>;
			pd-type = <7>;
		};

		compute-cb@9 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <9>;
			label = "cdsprpc-smd";
			qcom,secure-context-bank;
			iommus = <&apps_smmu 0x1409 0x0400>;
			qcom,iommu-dma-addr-pool = <0x60000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			qcom,iommu-vmid = <0xA>;
			dma-coherent;

			pd-type = <6>;
		};

		compute-cb@10 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <11>;
			label = "cdsprpc-smd";
			iommus = <&apps_smmu 0x140B 0x0400>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			dma-coherent;
			qcom,iova-best-fit;
			qcom,iova-max-align-shift = <9>;
			pd-type = <7>;
			alloc-size-range = <0x0 0xFFFFFFFF>;
		};

		compute-cb@11 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <12>;
			label = "cdsprpc-smd";
			iommus = <&apps_smmu 0x140C 0x0400>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			dma-coherent;

			qcom,iova-max-align-shift = <9>;
			pd-type = <7>;
			alloc-size-range = <0x0 0xFFFFFFFF>;
		};

		compute-cb@12 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <13>;
			label = "cdsprpc-smd";
			iommus = <&apps_smmu 0x140D 0x0400>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			dma-coherent;

			qcom,iova-max-align-shift = <9>;
			pd-type = <7>;
			alloc-size-range = <0x0 0xFFFFFFFF>;
		};

		compute-cb@13 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <14>;
			label = "cdsprpc-smd";
			iommus = <&apps_smmu 0x140E 0x0400>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			dma-coherent;

			qcom,iova-max-align-shift = <9>;
			pd-type = <7>;
			alloc-size-range = <0x0 0xFFFFFFFF>;
		};
	};
};