// SPDX-License-Identifier: BSD-3-Clause
/*
 * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
 */

#include <dt-bindings/interrupt-controller/arm-gic.h>

&soc {
	mdss_mdp: qcom,mdss_mdp@ae00000 {
	};

	mdss_dsi0: qcom,mdss_dsi_ctrl0@ae94000 {
		compatible = "qcom,dsi-ctrl-hw-v2.9";
		label = "dsi-ctrl-0";
		cell-index = <0>;
		frame-threshold-time-us = <800>;
		reg = <0xae94000 0x1000>,
			<0xaf0f000 0x4>,
			<0x0ae36000 0x300>;
		reg-names = "dsi_ctrl", "disp_cc_base", "mdp_intf_base";
		interrupt-parent = <&mdss_mdp>;
		interrupts = <4 0>;

		qcom,ctrl-supply-entries {
			#address-cells = <1>;
			#size-cells = <0>;

			qcom,ctrl-supply-entry@0 {
				reg = <0>;
				qcom,supply-name = "vdda-1p2";
				qcom,supply-min-voltage = <1200000>;
				qcom,supply-max-voltage = <1320000>;
				qcom,supply-enable-load = <16600>;
				qcom,supply-disable-load = <0>;
			};
		};
	};

	mdss_dsi1: qcom,mdss_dsi_ctrl1@ae96000 {
		compatible = "qcom,dsi-ctrl-hw-v2.9";
		label = "dsi-ctrl-1";
		cell-index = <1>;
		frame-threshold-time-us = <800>;
		reg = <0xae96000 0x1000>,
			<0xaf0f000 0x4>,
			<0x0ae37000 0x300>;
		reg-names = "dsi_ctrl", "disp_cc_base", "mdp_intf_base";
		interrupt-parent = <&mdss_mdp>;
		interrupts = <5 0>;

		qcom,ctrl-supply-entries {
			#address-cells = <1>;
			#size-cells = <0>;
			qcom,ctrl-supply-entry@0 {
				reg = <0>;
				qcom,supply-name = "vdda-1p2";
				qcom,supply-min-voltage = <1200000>;
				qcom,supply-max-voltage = <1320000>;
				qcom,supply-enable-load = <16600>;
				qcom,supply-disable-load = <0>;
			};
		};
	};

	mdss_dsi_phy0: qcom,mdss_dsi_phy0@ae95500 {
		compatible = "qcom,dsi-phy-v5.2";
		label = "dsi-phy-0";
		cell-index = <0>;
		#clock-cells = <1>;
		reg = <0xae95000 0xa00>,
		      <0xae95500 0x400>,
		      <0xae94200 0xa0>;
		reg-names = "dsi_phy", "pll_base", "dyn_refresh_base";
		pll-label = "dsi_pll_4nm";

		qcom,platform-strength-ctrl = [55 03
						55 03
						55 03
						55 03
						55 00];
		qcom,platform-lane-config = [00 00 0a 0a
						00 00 0a 0a
						00 00 0a 0a
						00 00 0a 0a
						00 00 8a 8a];
		qcom,platform-regulator-settings = [1d 1d 1d 1d 1d];

		qcom,phy-supply-entries {
			#address-cells = <1>;
			#size-cells = <0>;
			qcom,phy-supply-entry@0 {
				reg = <0>;
				qcom,supply-name = "vdda-0p9";
				qcom,supply-min-voltage = <880000>;
				qcom,supply-max-voltage = <950000>;
				qcom,supply-enable-load = <98000>;
				qcom,supply-disable-load = <96>;
			};
		};
	};

	mdss_dsi_phy1: qcom,mdss_dsi_phy1@ae97500 {
		compatible = "qcom,dsi-phy-v5.2";
		label = "dsi-phy-1";
		cell-index = <1>;
		#clock-cells = <1>;
		reg = <0xae97000 0xa00>,
		      <0xae97500 0x400>,
		      <0xae96200 0xa0>;
		reg-names = "dsi_phy", "pll_base", "dyn_refresh_base";
		pll-label = "dsi_pll_4nm";

		qcom,platform-strength-ctrl = [55 03
						55 03
						55 03
						55 03
						55 00];
		qcom,platform-regulator-settings = [1d 1d 1d 1d 1d];
		qcom,platform-lane-config = [00 00 0a 0a
						00 00 0a 0a
						00 00 0a 0a
						00 00 0a 0a
						00 00 8a 8a];
		qcom,phy-supply-entries {
			#address-cells = <1>;
			#size-cells = <0>;
			qcom,phy-supply-entry@0 {
				reg = <0>;
				qcom,supply-name = "vdda-0p9";
				qcom,supply-min-voltage = <880000>;
				qcom,supply-max-voltage = <950000>;
				qcom,supply-enable-load = <98000>;
				qcom,supply-disable-load = <96>;
			};
		};
	};

	dsi_pll_codes_data:dsi_pll_codes {
		reg = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
			0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
			0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
			0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
			0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
			0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
			0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
			0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
		label = "dsi_pll_codes";
	};
};